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| author | Chris Lattner <sabre@nondot.org> | 2011-02-13 19:53:36 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2011-02-13 19:53:36 +0000 |
| commit | d8c7ff00191c6e585db96df55748b06cdfa207c8 (patch) | |
| tree | a8a6b1b5ac59c554347b1451169482bb45ccb4a0 | |
| parent | e075118489baf15a7cea2e7f155b4799b93d6d02 (diff) | |
fix thinko :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125466 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/llvm/CodeGen/ISDOpcodes.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h index 8ace6c4e49..3da11c4a0e 100644 --- a/include/llvm/CodeGen/ISDOpcodes.h +++ b/include/llvm/CodeGen/ISDOpcodes.h @@ -311,8 +311,8 @@ namespace ISD { /// the shift amount can be any type, but care must be taken to ensure it is /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before /// legalization, types like i1024 can occur and i8 doesn't have enough bits - /// to represent the shift amount. By convention, DAGCombine and IRBuilder - /// forces these shift amounts to i32 for simplicity. + /// to represent the shift amount. By convention, DAGCombine and + /// SelectionDAGBuilder forces these shift amounts to i32 for simplicity. /// SHL, SRA, SRL, ROTL, ROTR, |