diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2010-12-04 04:40:19 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-12-04 04:40:19 +0000 |
| commit | c24130bade8c348d0d437644b01ebdd3c65e6681 (patch) | |
| tree | bc7f8a93d7a6e98e34b53362093eb3bee5b0a9fe | |
| parent | 7f762187209baded73a24a9040edb6b3b29bada4 (diff) | |
The Thumb tADDrSPi instruction is not valid when the destination is SP.
Check for that and try narrowing it to tADDspi instead. Radar 8724703.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120892 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/Thumb2SizeReduction.cpp | 9 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll | 11 |
2 files changed, 19 insertions, 1 deletions
diff --git a/lib/Target/ARM/Thumb2SizeReduction.cpp b/lib/Target/ARM/Thumb2SizeReduction.cpp index 89232f3f7a..a44ac07cd6 100644 --- a/lib/Target/ARM/Thumb2SizeReduction.cpp +++ b/lib/Target/ARM/Thumb2SizeReduction.cpp @@ -58,7 +58,7 @@ namespace { { ARM::t2ADDri, ARM::tADDi3, ARM::tADDi8, 3, 8, 1, 1, 0,0, 0 }, { ARM::t2ADDrr, ARM::tADDrr, ARM::tADDhirr, 0, 0, 1, 0, 0,1, 0 }, // Note: immediate scale is 4. - { ARM::t2ADDrSPi,ARM::tADDrSPi,0, 8, 0, 1, 0, 1,0, 0 }, + { ARM::t2ADDrSPi,ARM::tADDrSPi,0, 8, 0, 1, 0, 1,0, 1 }, { ARM::t2ADDSri,ARM::tADDi3, ARM::tADDi8, 3, 8, 1, 1, 2,2, 1 }, { ARM::t2ADDSrr,ARM::tADDrr, 0, 0, 0, 1, 0, 2,0, 1 }, { ARM::t2ANDrr, 0, ARM::tAND, 0, 0, 0, 1, 0,0, 0 }, @@ -469,6 +469,13 @@ Thumb2SizeReduce::ReduceSpecial(MachineBasicBlock &MBB, MachineInstr *MI, return true; return ReduceToNarrow(MBB, MI, Entry, LiveCPSR); } + case ARM::t2ADDrSPi: { + static const ReduceEntry NarrowEntry = + { ARM::t2ADDrSPi,ARM::tADDspi, 0, 7, 0, 1, 0, 1, 0, 1 }; + if (MI->getOperand(0).getReg() == ARM::SP) + return ReduceToNarrow(MBB, MI, NarrowEntry, LiveCPSR); + return ReduceToNarrow(MBB, MI, Entry, LiveCPSR); + } } return false; } diff --git a/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll b/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll new file mode 100644 index 0000000000..5b91a5f65a --- /dev/null +++ b/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s +; Radar 8724703: Make sure that a t2ADDrSPi instruction with SP as the +; destination register is narrowed to tADDspi instead of tADDrSPi. + +define void @test() nounwind { +entry: +; CHECK: sub.w +; CHECK: add.w + %Buffer.i = alloca [512 x i8], align 4 + ret void +} |