diff options
| author | Bill Wendling <isanbard@gmail.com> | 2010-09-02 22:26:35 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-09-02 22:26:35 +0000 |
| commit | bc54ee9a77b496ba1d8dbbfc6bacd9b20066b31e (patch) | |
| tree | 31a304aa5cdc308060d897933e499a3d767bd89a | |
| parent | 9c282011e6b7a6e23a3a163ec9c865890449e8dc (diff) | |
- Change __builtin_ia32_palignr intrinsic type to match the pattern in clang.
- Add patterns to match the following MMX builtins:
* __builtin_ia32_vec_init_v8qi
* __builtin_ia32_vec_init_v4hi
* __builtin_ia32_vec_init_v2si
* __builtin_ia32_vec_ext_v2si
These builtins do not correspond to a single MMX instruction. They will have
to be lowered -- most likely in the back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112881 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/llvm/IntrinsicsX86.td | 29 |
1 files changed, 24 insertions, 5 deletions
diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index b06fe33616..65f01ad822 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -1570,9 +1570,9 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">, Intrinsic<[], [llvm_ptr_ty, llvm_v1i64_ty], []>; -// def int_x86_mmx_palignr_b : GCCBuiltin<"__builtin_ia32_palignr">, -// Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, -// llvm_v1i64_ty, llvm_i8_ty], [IntrNoMem]>; +// def int_x86_mmx_palignr_b : GCCBuiltin<"__builtin_ia32_palignr">, +// Intrinsic<[llvm_v8i8_ty], [llvm_8i8_ty, +// llvm_v8i8_ty, llvm_i8_ty], [IntrNoMem]>; def int_x86_mmx_pextr_w : Intrinsic<[llvm_i32_ty], [llvm_v1i64_ty, llvm_i32_ty], @@ -1583,7 +1583,26 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; def int_x86_mmx_cvtsi32_si64 : - Intrinsic<[llvm_v1i64_ty], [llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_v1i64_ty], [llvm_i32_ty], [IntrNoMem]>; def int_x86_mmx_cvtsi64_si32 : - Intrinsic<[llvm_i32_ty], [llvm_v1i64_ty], [IntrNoMem]>; + Intrinsic<[llvm_i32_ty], [llvm_v1i64_ty], [IntrNoMem]>; + + def int_x86_mmx_vec_init_b : GCCBuiltin<"__builtin_ia32_vec_init_v8qi">, + Intrinsic<[llvm_v8i8_ty], + [llvm_i8_ty, llvm_i8_ty, llvm_i8_ty, llvm_i8_ty, + llvm_i8_ty, llvm_i8_ty, llvm_i8_ty, llvm_i8_ty], + [IntrNoMem]>; + def int_x86_mmx_vec_init_w : GCCBuiltin<"__builtin_ia32_vec_init_v4hi">, + Intrinsic<[llvm_v4i16_ty], + [llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], + [IntrNoMem]>; + def int_x86_mmx_vec_init_d : GCCBuiltin<"__builtin_ia32_vec_init_v2si">, + Intrinsic<[llvm_v2i32_ty], + [llvm_i32_ty, llvm_i32_ty], + [IntrNoMem]>; + + def int_x86_mmx_vec_ext_d : GCCBuiltin<"__builtin_ia32_vec_ext_v2si">, + Intrinsic<[llvm_v2i32_ty], + [llvm_v2i32_ty, llvm_i32_ty], + [IntrNoMem]>; } |