teach VMCore to accept i1 add's and shifts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33223 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 17 insertions, 17 deletions

diff --git a/lib/VMCore/Instructions.cpp b/lib/VMCore/Instructions.cpp
index 9486fb86d7..c79ebff44b 100644
--- a/lib/VMCore/Instructions.cpp
+++ b/lib/VMCore/Instructions.cpp
@@ -1025,7 +1025,7 @@ void BinaryOperator::init(BinaryOps iType)
   case Mul: 
     assert(getType() == LHS->getType() &&
            "Arithmetic operation should return same type as operands!");
-    assert((getType()->isInteger() || getType()->isFloatingPoint() ||
+    assert((getType()->isIntegral() || getType()->isFloatingPoint() ||
             isa<PackedType>(getType())) &&
           "Tried to create an arithmetic operation on a non-arithmetic type!");
     break;
@@ -1033,8 +1033,8 @@ void BinaryOperator::init(BinaryOps iType)
   case SDiv: 
     assert(getType() == LHS->getType() &&
            "Arithmetic operation should return same type as operands!");
-    assert((getType()->isInteger() || (isa<PackedType>(getType()) && 
-            cast<PackedType>(getType())->getElementType()->isInteger())) &&
+    assert((getType()->isIntegral() || (isa<PackedType>(getType()) && 
+            cast<PackedType>(getType())->getElementType()->isIntegral())) &&
            "Incorrect operand type (not integer) for S/UDIV");
     break;
   case FDiv:
@@ -1048,8 +1048,8 @@ void BinaryOperator::init(BinaryOps iType)
   case SRem: 
     assert(getType() == LHS->getType() &&
            "Arithmetic operation should return same type as operands!");
-    assert((getType()->isInteger() || (isa<PackedType>(getType()) && 
-            cast<PackedType>(getType())->getElementType()->isInteger())) &&
+    assert((getType()->isIntegral() || (isa<PackedType>(getType()) && 
+            cast<PackedType>(getType())->getElementType()->isIntegral())) &&
            "Incorrect operand type (not integer) for S/UREM");
     break;
   case FRem:
@@ -1351,7 +1351,7 @@ unsigned CastInst::isEliminableCastPair(
     case 3: 
       // no-op cast in second op implies firstOp as long as the DestTy 
       // is integer
-      if (DstTy->isInteger())
+      if (DstTy->isIntegral())
         return firstOp;
       return 0;
     case 4:
@@ -1363,7 +1363,7 @@ unsigned CastInst::isEliminableCastPair(
     case 5: 
       // no-op cast in first op implies secondOp as long as the SrcTy
       // is an integer
-      if (SrcTy->isInteger())
+      if (SrcTy->isIntegral())
         return secondOp;
       return 0;
     case 6:
@@ -1715,11 +1715,11 @@ checkCast(Instruction::CastOps op, Value *S, const Type *DstTy) {
   switch (op) {
   default: return false; // This is an input error
   case Instruction::Trunc:
-    return SrcTy->isInteger() && DstTy->isIntegral() && SrcBitSize > DstBitSize;
+    return SrcTy->isIntegral() && DstTy->isIntegral()&& SrcBitSize > DstBitSize;
   case Instruction::ZExt:
-    return SrcTy->isIntegral() && DstTy->isInteger() && SrcBitSize < DstBitSize;
+    return SrcTy->isIntegral() && DstTy->isIntegral()&& SrcBitSize < DstBitSize;
   case Instruction::SExt: 
-    return SrcTy->isIntegral() && DstTy->isInteger() && SrcBitSize < DstBitSize;
+    return SrcTy->isIntegral() && DstTy->isIntegral()&& SrcBitSize < DstBitSize;
   case Instruction::FPTrunc:
     return SrcTy->isFloatingPoint() && DstTy->isFloatingPoint() && 
       SrcBitSize > DstBitSize;
diff --git a/lib/VMCore/Verifier.cpp b/lib/VMCore/Verifier.cpp
index 05b8514d9d..821fccd6a4 100644
--- a/lib/VMCore/Verifier.cpp
+++ b/lib/VMCore/Verifier.cpp
@@ -501,7 +501,7 @@ void Verifier::visitTruncInst(TruncInst &I) {
   unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
 
   Assert1(SrcTy->isIntegral(), "Trunc only operates on integer", &I);
-  Assert1(DestTy->isIntegral(),"Trunc only produces integral", &I);
+  Assert1(DestTy->isIntegral(), "Trunc only produces integer", &I);
   Assert1(SrcBitSize > DestBitSize,"DestTy too big for Trunc", &I);
 
   visitInstruction(I);
@@ -513,11 +513,11 @@ void Verifier::visitZExtInst(ZExtInst &I) {
   const Type *DestTy = I.getType();
 
   // Get the size of the types in bits, we'll need this later
+  Assert1(SrcTy->isIntegral(), "ZExt only operates on integer", &I);
+  Assert1(DestTy->isIntegral(), "ZExt only produces an integer", &I);
   unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
   unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
 
-  Assert1(SrcTy->isIntegral(),"ZExt only operates on integral", &I);
-  Assert1(DestTy->isInteger(),"ZExt only produces an integer", &I);
   Assert1(SrcBitSize < DestBitSize,"Type too small for ZExt", &I);
 
   visitInstruction(I);
@@ -532,8 +532,8 @@ void Verifier::visitSExtInst(SExtInst &I) {
   unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
   unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
 
-  Assert1(SrcTy->isIntegral(),"SExt only operates on integral", &I);
-  Assert1(DestTy->isInteger(),"SExt only produces an integer", &I);
+  Assert1(SrcTy->isIntegral(), "SExt only operates on integer", &I);
+  Assert1(DestTy->isIntegral(), "SExt only produces an integer", &I);
   Assert1(SrcBitSize < DestBitSize,"Type too small for SExt", &I);
 
   visitInstruction(I);
@@ -728,7 +728,7 @@ void Verifier::visitBinaryOperator(BinaryOperator &B) {
     Assert1(B.getType() == B.getOperand(0)->getType(),
             "Arithmetic operators must have same type for operands and result!",
             &B);
-    Assert1(B.getType()->isInteger() || B.getType()->isFloatingPoint() ||
+    Assert1(B.getType()->isIntegral() || B.getType()->isFloatingPoint() ||
             isa<PackedType>(B.getType()),
             "Arithmetic operators must have integer, fp, or packed type!", &B);
   }
@@ -761,7 +761,7 @@ void Verifier::visitFCmpInst(FCmpInst& FC) {
 }
 
 void Verifier::visitShiftInst(ShiftInst &SI) {
-  Assert1(SI.getType()->isInteger(),
+  Assert1(SI.getType()->isIntegral(),
           "Shift must return an integer result!", &SI);
   Assert1(SI.getType() == SI.getOperand(0)->getType(),
           "Shift return type must be same as first operand!", &SI);