diff options
| author | Jim Grosbach <grosbach@apple.com> | 2013-02-27 21:31:12 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2013-02-27 21:31:12 +0000 |
| commit | b302a4e6b572a360d7153d2e1e14b53f053c282d (patch) | |
| tree | 92f595f2fd34c11e078abf8dacb8f2134eba7577 | |
| parent | 0a4da9c6a12371bb8bb36ef5cbb6922e0138dde2 (diff) | |
ARM: FMA is legal only if VFP4 is available.
rdar://13306723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176212 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 6 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2013-02-27-expand-vfma.ll | 31 |
2 files changed, 37 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index b8ff5b3bd6..244dac5ca4 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -554,6 +554,12 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::CTPOP, MVT::v4i16, Custom); setOperationAction(ISD::CTPOP, MVT::v8i16, Custom); + // NEON only has FMA instructions as of VFP4. + if (!Subtarget->hasVFP4()) { + setOperationAction(ISD::FMA, MVT::v2f32, Expand); + setOperationAction(ISD::FMA, MVT::v4f32, Expand); + } + setTargetDAGCombine(ISD::INTRINSIC_VOID); setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); diff --git a/test/CodeGen/ARM/2013-02-27-expand-vfma.ll b/test/CodeGen/ARM/2013-02-27-expand-vfma.ll new file mode 100644 index 0000000000..0e3bf23710 --- /dev/null +++ b/test/CodeGen/ARM/2013-02-27-expand-vfma.ll @@ -0,0 +1,31 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=armv7s-apple-darwin | FileCheck %s -check-prefix=VFP4 + +define <4 x float> @muladd(<4 x float> %a, <4 x float> %b, <4 x float> %c) nounwind { +; CHECK: muladd: +; CHECK: fmaf +; CHECK: fmaf +; CHECK: fmaf +; CHECK: fmaf +; CHECK-NOT: fmaf + +; CHECK-VFP4: vfma.f32 + %tmp = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %b, <4 x float> %c, <4 x float> %a) #2 + ret <4 x float> %tmp +} + +declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) #1 + +define <2 x float> @muladd2(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind { +; CHECK: muladd2: +; CHECK: fmaf +; CHECK: fmaf +; CHECK-NOT: fmaf + +; CHECK-VFP4: vfma.f32 + %tmp = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %b, <2 x float> %c, <2 x float> %a) #2 + ret <2 x float> %tmp +} + +declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) #1 + |