Make sure to return the result in the right type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27469 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 6 insertions, 4 deletions

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 686f2fa069..7a92b961ee 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -962,10 +962,12 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     assert(CompareOpc>0 && "We only lower altivec predicate compares so far!");
 
     // If this is a non-dot comparison, make the VCMP node.
-    if (!isDot)
-      return DAG.getNode(PPCISD::VCMP, Op.getOperand(2).getValueType(),
-                         Op.getOperand(1), Op.getOperand(2),
-                         DAG.getConstant(CompareOpc, MVT::i32));
+    if (!isDot) {
+      SDOperand Tmp = DAG.getNode(PPCISD::VCMP, Op.getOperand(2).getValueType(),
+                                  Op.getOperand(1), Op.getOperand(2),
+                                  DAG.getConstant(CompareOpc, MVT::i32));
+      return DAG.getNode(ISD::BIT_CONVERT, Op.getValueType(), Tmp);
+    }
     
     // Create the PPCISD altivec 'dot' comparison node.
     std::vector<SDOperand> Ops;