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authorEvan Cheng <evan.cheng@apple.com>2005-12-17 01:25:19 +0000
committerEvan Cheng <evan.cheng@apple.com>2005-12-17 01:25:19 +0000
commit8dee8cca3a168676ea5603c3140ea094a51911f8 (patch)
treee414b1378075951e10f9b677573ccfe876bdc295
parentaed7c721dfd6a3a27d07f582cb0057e64385ba45 (diff)
Added some isel ideas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24757 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/README.txt14
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt
index 57aec86d2e..6e23fca25c 100644
--- a/lib/Target/X86/README.txt
+++ b/lib/Target/X86/README.txt
@@ -88,3 +88,17 @@ into:
movzbl %dil, %eax
xorl $1, %eax
ret
+
+//===---------------------------------------------------------------------===//
+
+Some isel ideas:
+
+1. Dynamic programming based approach when compile time if not an
+ issue.
+2. Code duplication (addressing mode) during isel.
+3. Other ideas from "Register-Sensitive Selection, Duplication, and
+ Sequencing of Instructions".
+
+//===---------------------------------------------------------------------===//
+
+Should we promote i16 to i32 to avoid partial register update stalls?