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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-09 01:15:04 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-09 01:15:04 +0000 |
| commit | 8ae6ffacdd115c096213332928441ff3776704a4 (patch) | |
| tree | 83c65a057758ac488155ddf0fe57d78e35e4a41f | |
| parent | d2ca8135496ff7945e8a708dccb26b482e563a63 (diff) | |
Multiply instructions are issued on pipeline 0. They do not need to reserve pipeline 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116135 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMScheduleA8.td | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/lib/Target/ARM/ARMScheduleA8.td b/lib/Target/ARM/ARMScheduleA8.td index d4d2118bc2..7aa03c4b4b 100644 --- a/lib/Target/ARM/ARMScheduleA8.td +++ b/lib/Target/ARM/ARMScheduleA8.td @@ -89,16 +89,11 @@ def CortexA8Itineraries : ProcessorItineraries< // so we use 6 for those cases // InstrItinData<IIC_iMUL16 , [InstrStage<1, [A8_Pipe0]>], [5, 1, 1]>, - InstrItinData<IIC_iMAC16 , [InstrStage<1, [A8_Pipe1], 0>, - InstrStage<2, [A8_Pipe0]>], [6, 1, 1, 4]>, - InstrItinData<IIC_iMUL32 , [InstrStage<1, [A8_Pipe1], 0>, - InstrStage<2, [A8_Pipe0]>], [6, 1, 1]>, - InstrItinData<IIC_iMAC32 , [InstrStage<1, [A8_Pipe1], 0>, - InstrStage<2, [A8_Pipe0]>], [6, 1, 1, 4]>, - InstrItinData<IIC_iMUL64 , [InstrStage<2, [A8_Pipe1], 0>, - InstrStage<3, [A8_Pipe0]>], [6, 6, 1, 1]>, - InstrItinData<IIC_iMAC64 , [InstrStage<2, [A8_Pipe1], 0>, - InstrStage<3, [A8_Pipe0]>], [6, 6, 1, 1]>, + InstrItinData<IIC_iMAC16 , [InstrStage<2, [A8_Pipe0]>], [6, 1, 1, 4]>, + InstrItinData<IIC_iMUL32 , [InstrStage<2, [A8_Pipe0]>], [6, 1, 1]>, + InstrItinData<IIC_iMAC32 , [InstrStage<2, [A8_Pipe0]>], [6, 1, 1, 4]>, + InstrItinData<IIC_iMUL64 , [InstrStage<3, [A8_Pipe0]>], [6, 6, 1, 1]>, + InstrItinData<IIC_iMAC64 , [InstrStage<3, [A8_Pipe0]>], [6, 6, 1, 1]>, // Integer load pipeline // |