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| author | Nick Lewycky <nicholas@mxc.ca> | 2010-09-29 18:56:57 +0000 |
|---|---|---|
| committer | Nick Lewycky <nicholas@mxc.ca> | 2010-09-29 18:56:57 +0000 |
| commit | 8892b033e4c8d25403f10ad3977a8905ec4c5029 (patch) | |
| tree | e462139251795ae36c1404dad2eaa2629d17b8fe | |
| parent | 3c99c769eb8995ba25de21aa686b09e53d2a7bbe (diff) | |
Add parens to fix GCC warning:
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115064 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86MCCodeEmitter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp index e9ce02f1ff..3b82a5d32c 100644 --- a/lib/Target/X86/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/X86MCCodeEmitter.cpp @@ -186,8 +186,8 @@ static bool Is32BitMemOperand(const MCInst &MI, unsigned Op) { const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); - if (BaseReg.getReg() != 0 && X86::GR32RegClass.contains(BaseReg.getReg()) || - IndexReg.getReg() != 0 && X86::GR32RegClass.contains(IndexReg.getReg())) + if ((BaseReg.getReg() != 0 && X86::GR32RegClass.contains(BaseReg.getReg())) || + (IndexReg.getReg() != 0 && X86::GR32RegClass.contains(IndexReg.getReg()))) return true; return false; } |