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| author | Scott Michel <scottm@aero.org> | 2008-12-29 03:21:37 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2008-12-29 03:21:37 +0000 |
| commit | 845145f8b5f7feb8617bcfcfd3803ef80b17765d (patch) | |
| tree | 837e8026385aefb8333319537101b74d6bdbc08d | |
| parent | 9ace0cdb12be5e9c213567209ace721dfeccaddf (diff) | |
Teach LeaglizeDAG that i64 mul can be a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61463 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index d79f6bb1e1..2c0d9ddcc1 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3281,6 +3281,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case ISD::MUL: if (VT == MVT::i32) LC = RTLIB::MUL_I32; + else if (VT == MVT::i64) + LC = RTLIB::MUL_I64; break; case ISD::FPOW: LC = GetFPLibCall(VT, RTLIB::POW_F32, RTLIB::POW_F64, RTLIB::POW_F80, |