diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-04-28 21:44:03 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-04-28 21:44:03 +0000 |
| commit | 7f64464ff100bcb7661b65c74c13dc88e83eb65b (patch) | |
| tree | bc852ed18dc369e180456ab868aaef16aa045fc6 | |
| parent | 5624c75f9f2bb921872af33508f0d53c653de869 (diff) | |
Add FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21605 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 6 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 |
2 files changed, 7 insertions, 4 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 1df651381c..f3be3344a9 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -168,9 +168,9 @@ namespace ISD { // FP_EXTEND - Extend a smaller FP type into a larger FP type. FP_EXTEND, - // FNEG, FABS - Perform unary floating point negation and absolute value - // operations. - FNEG, FABS, + // FNEG, FABS, FSQRT, FSIN, FCOS - Perform unary floating point negation, + // absolute value, square root, sine and cosine operations. + FNEG, FABS, FSQRT, FSIN, FCOS, // Other operators. LOAD and STORE have token chains as their first // operand, then the same operands as an LLVM load/store instruction. diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 2a88270965..f9b347d4c9 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1568,6 +1568,9 @@ const char *SDNode::getOperationName() const { // Unary operators case ISD::FABS: return "fabs"; case ISD::FNEG: return "fneg"; + case ISD::FSQRT: return "fsqrt"; + case ISD::FSIN: return "fsin"; + case ISD::FCOS: return "fcos"; // Binary operators case ISD::ADD: return "add"; @@ -1593,7 +1596,7 @@ const char *SDNode::getOperationName() const { case ISD::SRA_PARTS: return "sra_parts"; case ISD::SRL_PARTS: return "srl_parts"; - // Conversion operators. + // Conversion operators. case ISD::SIGN_EXTEND: return "sign_extend"; case ISD::ZERO_EXTEND: return "zero_extend"; case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; |