diff options
| author | Bill Wendling <isanbard@gmail.com> | 2011-01-12 21:20:59 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2011-01-12 21:20:59 +0000 |
| commit | 7caebff83d90a59aa74876ff887e822387f479e0 (patch) | |
| tree | 43dd694d3c814bb19a52e6f1bd396d8a0981db91 | |
| parent | 85bbd576ea3078a7cd9d8a17228f4c2dce35be2c (diff) | |
Sort the register list based on the *actual* register numbers rather than the
enum values we give to them. <rdar://problem/8823730>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123321 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 10 | ||||
| -rw-r--r-- | test/MC/ARM/reg-list.s | 8 |
2 files changed, 13 insertions, 5 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index b51e351172..b672bc4ce4 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -583,15 +583,15 @@ ParseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { SmallVectorImpl<std::pair<unsigned, SMLoc> >::const_iterator RI = Registers.begin(), RE = Registers.end(); - DenseMap<unsigned, bool> RegMap; - RegMap[RI->first] = true; - - unsigned HighRegNum = RI->first; + unsigned HighRegNum = getARMRegisterNumbering(RI->first); bool EmittedWarning = false; + DenseMap<unsigned, bool> RegMap; + RegMap[HighRegNum] = true; + for (++RI; RI != RE; ++RI) { const std::pair<unsigned, SMLoc> &RegInfo = *RI; - unsigned Reg = RegInfo.first; + unsigned Reg = getARMRegisterNumbering(RegInfo.first); if (RegMap[Reg]) { Error(RegInfo.second, "register duplicated in register list"); diff --git a/test/MC/ARM/reg-list.s b/test/MC/ARM/reg-list.s new file mode 100644 index 0000000000..4dd392e837 --- /dev/null +++ b/test/MC/ARM/reg-list.s @@ -0,0 +1,8 @@ +@ RUN: llvm-mc -triple thumb-apple-darwin10 -show-encoding < %s 2> %t | FileCheck %s +@ RUN: FileCheck --check-prefix=CHECK-WARNINGS < %t %s + + push {r7, lr} +@ CHECK-WARNINGS: register not in ascending order in register list + + push {lr, r7} +@ CHECK: push {lr, r7} |