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authorEvan Cheng <evan.cheng@apple.com>2007-02-23 01:04:26 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-02-23 01:04:26 +0000
commit76d7e76c15c258ec4a71fd75a2a32bca3a5e5e27 (patch)
tree64ce602cfc27a30c7a1527c10772cf73286fb38e
parent96fa612373e258120d351ed14361f964ad22f99d (diff)
Use findRegisterUseOperand to find a kill of particular register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34512 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/CodeGen/MachineInstr.h5
-rw-r--r--lib/CodeGen/MachineInstr.cpp8
2 files changed, 8 insertions, 5 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 9cefe7bf20..ef06d97ea9 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -390,8 +390,9 @@ public:
}
/// findRegisterUseOperand() - Returns the MachineOperand that is a use of
- /// the specific register or NULL if it is not found.
- MachineOperand *findRegisterUseOperand(unsigned Reg);
+ /// the specific register or NULL if it is not found. It further tightening
+ /// the search criteria to a use that kills the register if isKill is true.
+ MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false);
/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
/// the specific register or NULL if it is not found.
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 01a3e3ee38..8c5da0272f 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -170,12 +170,14 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
}
/// findRegisterUseOperand() - Returns the MachineOperand that is a use of
-/// the specific register or NULL if it is not found.
-MachineOperand *MachineInstr::findRegisterUseOperand(unsigned Reg) {
+/// the specific register or NULL if it is not found. It further tightening
+/// the search criteria to a use that kills the register if isKill is true.
+MachineOperand *MachineInstr::findRegisterUseOperand(unsigned Reg, bool isKill){
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
MachineOperand &MO = getOperand(i);
if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
- return &MO;
+ if (!isKill || MO.isKill())
+ return &MO;
}
return NULL;
}