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| author | Matt Beaumont-Gay <matthewbg@google.com> | 2011-01-07 22:34:58 +0000 |
|---|---|---|
| committer | Matt Beaumont-Gay <matthewbg@google.com> | 2011-01-07 22:34:58 +0000 |
| commit | 697970286ac61ff5bf4659d51a2cf9e0a2b7800d (patch) | |
| tree | eb838530d3b8c995ef9632df512ed1fb3ce9b07f | |
| parent | 51a666f0e50a34b74212db9c5814153c885153a5 (diff) | |
Eliminate variable only used in debug builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123040 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 98939732a2..38daeaa5bb 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -3712,12 +3712,10 @@ SDValue ARMTargetLowering::ReconstructShuffle(SDValue Op, SelectionDAG &DAG) con // break it down again in a shuffle. return SDValue(); } - - unsigned SrcNumElts = SourceVecs[i].getValueType().getVectorNumElements(); // Since only 64-bit and 128-bit vectors are legal on ARM and // we've eliminated the other cases... - assert(SrcNumElts == 2*NumElts); + assert(SourceVecs[i].getValueType().getVectorNumElements() == 2*NumElts); if (MaxElts[i] - MinElts[i] >= NumElts) { // Span too large for a VEXT to cope |