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authorChris Lattner <sabre@nondot.org>2006-02-01 22:38:46 +0000
committerChris Lattner <sabre@nondot.org>2006-02-01 22:38:46 +0000
commit588732748ba804e1e258df8856e20b3b73348ac3 (patch)
tree641a60c19e0af7f21c215cee0fd08a3fb3607cb5
parent3e2b94a171dfd22883d9dbd99186dd74a7fcd7d7 (diff)
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25884 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/PowerPC/PPCAsmPrinter.cpp10
1 files changed, 8 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index cc74c7d712..ccd7fc4670 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -83,7 +83,7 @@ namespace {
void printMachineInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO);
- void printOperand(const MachineInstr *MI, unsigned OpNo){
+ void printOperand(const MachineInstr *MI, unsigned OpNo) {
const MachineOperand &MO = MI->getOperand(OpNo);
if (MO.getType() == MachineOperand::MO_MachineRegister) {
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
@@ -94,7 +94,13 @@ namespace {
printOp(MO);
}
}
-
+
+ bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+ unsigned AsmVariant) {
+ printOperand(MI, OpNo);
+ return false;
+ }
+
void printU5ImmOperand(const MachineInstr *MI, unsigned OpNo) {
unsigned char value = MI->getOperand(OpNo).getImmedValue();
assert(value <= 31 && "Invalid u5imm argument!");