diff options
author | Bill Wendling <isanbard@gmail.com> | 2010-03-12 02:00:43 +0000 |
---|---|---|
committer | Bill Wendling <isanbard@gmail.com> | 2010-03-12 02:00:43 +0000 |
commit | 53351a175df59c0f8b96011f30842d87046fc9d6 (patch) | |
tree | e0bc59acc4ba82d3642851d34b49a8f4d698a5fe | |
parent | f789d26f810243ffd6db79e15a6f10821d785308 (diff) |
The same situation that effected ARM effects PPC with regards to placing the
LSDA into the TEXT section. We need to generate non-lazy pointers to it on
Mach-O. However, the object the NLP points to may be local to the translation
unit. If so, then the NLP needs to have the value of that object specified
instead of "0", which the linker interprets as "external".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98325 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp | 10 | ||||
-rw-r--r-- | lib/Target/PowerPC/CMakeLists.txt | 1 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 7 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCTargetObjectFile.cpp | 33 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCTargetObjectFile.h | 34 |
5 files changed, 81 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp index 9e635c6b4e..40d6778b64 100644 --- a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp @@ -812,7 +812,15 @@ bool PPCDarwinAsmPrinter::doFinalization(Module &M) { // .indirect_symbol _foo MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; OutStreamer.EmitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol); - OutStreamer.EmitIntValue(0, isPPC64 ? 8 : 4/*size*/, 0/*addrspace*/); + + if (MCSym.getInt()) + // External to current translation unit. + OutStreamer.EmitIntValue(0, isPPC64 ? 8 : 4/*size*/, 0/*addrspace*/); + else + // Internal to current translation unit. + OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(), + OutContext), + isPPC64 ? 8 : 4/*size*/, 0/*addrspace*/); } Stubs.clear(); diff --git a/lib/Target/PowerPC/CMakeLists.txt b/lib/Target/PowerPC/CMakeLists.txt index c997c5cfc7..c86b9b9dd1 100644 --- a/lib/Target/PowerPC/CMakeLists.txt +++ b/lib/Target/PowerPC/CMakeLists.txt @@ -24,6 +24,7 @@ add_llvm_target(PowerPCCodeGen PPCRegisterInfo.cpp PPCSubtarget.cpp PPCTargetMachine.cpp + PPCTargetObjectFile.cpp ) target_link_libraries (LLVMPowerPCCodeGen LLVMSelectionDAG) diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index aeaa7c6816..106e779af8 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -13,9 +13,10 @@ #include "PPCISelLowering.h" #include "PPCMachineFunctionInfo.h" +#include "PPCPerfectShuffle.h" #include "PPCPredicates.h" #include "PPCTargetMachine.h" -#include "PPCPerfectShuffle.h" +#include "PPCTargetObjectFile.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/VectorExtras.h" #include "llvm/CodeGen/CallingConvLower.h" @@ -59,11 +60,11 @@ cl::desc("enable preincrement load/store generation on PPC (experimental)"), static TargetLoweringObjectFile *CreateTLOF(const PPCTargetMachine &TM) { if (TM.getSubtargetImpl()->isDarwin()) - return new TargetLoweringObjectFileMachO(); + return new PPCMachOTargetObjectFile(); + return new TargetLoweringObjectFileELF(); } - PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) : TargetLowering(TM, CreateTLOF(TM)), PPCSubTarget(*TM.getSubtargetImpl()) { diff --git a/lib/Target/PowerPC/PPCTargetObjectFile.cpp b/lib/Target/PowerPC/PPCTargetObjectFile.cpp new file mode 100644 index 0000000000..de81040021 --- /dev/null +++ b/lib/Target/PowerPC/PPCTargetObjectFile.cpp @@ -0,0 +1,33 @@ +//===-- llvm/Target/PPCTargetObjectFile.cpp - PPC Object Info Impl --------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "PPCTargetObjectFile.h" +#include "PPCSubtarget.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/Support/Dwarf.h" +#include "llvm/Target/TargetMachine.h" +using namespace llvm; +using namespace dwarf; + +//===----------------------------------------------------------------------===// +// Mach-O Target +//===----------------------------------------------------------------------===// + +void PPCMachOTargetObjectFile::Initialize(MCContext &Ctx, + const TargetMachine &TM) { + TargetLoweringObjectFileMachO::Initialize(Ctx, TM); + + // Exception Handling. + LSDASection = getMachOSection("__TEXT", "__gcc_except_tab", 0, + SectionKind::getReadOnlyWithRel()); +} + +unsigned PPCMachOTargetObjectFile::getTTypeEncoding() const { + return DW_EH_PE_indirect | DW_EH_PE_pcrel | DW_EH_PE_sdata4; +} diff --git a/lib/Target/PowerPC/PPCTargetObjectFile.h b/lib/Target/PowerPC/PPCTargetObjectFile.h new file mode 100644 index 0000000000..2d40bc9ceb --- /dev/null +++ b/lib/Target/PowerPC/PPCTargetObjectFile.h @@ -0,0 +1,34 @@ +//===-- llvm/Target/PPCTargetObjectFile.h - PowerPC Object Info -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_TARGET_PPC_TARGETOBJECTFILE_H +#define LLVM_TARGET_PPC_TARGETOBJECTFILE_H + +#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" + +namespace llvm { + +class MCContext; +class TargetMachine; + +// FIXME: This subclass isn't 100% necessary. It will become obsolete once we +// can place all LSDAs into the TEXT section. See +// <rdar://problem/6804645>. +class PPCMachOTargetObjectFile : public TargetLoweringObjectFileMachO { +public: + PPCMachOTargetObjectFile() : TargetLoweringObjectFileMachO() {} + + virtual void Initialize(MCContext &Ctx, const TargetMachine &TM); + + virtual unsigned getTTypeEncoding() const; +}; + +} // end namespace llvm + +#endif |