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| author | Jim Grosbach <grosbach@apple.com> | 2011-08-23 18:33:38 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-08-23 18:33:38 +0000 |
| commit | 4c821d800a50251633c206b9fe42c99e12f3f511 (patch) | |
| tree | 2ba1e3ef87e3f96599e681643aab40ce1629db41 | |
| parent | 3395fe1e4b615ca30da893edd48474c672a74da5 (diff) | |
Thumb parsing and encoding for STR.
Not including tSTRspi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138347 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/MC/ARM/basic-thumb-instructions.s | 22 | ||||
| -rw-r--r-- | test/MC/ARM/thumb-diagnostics.s | 15 |
2 files changed, 37 insertions, 0 deletions
diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s index 741fe85f10..a8d13cf1a5 100644 --- a/test/MC/ARM/basic-thumb-instructions.s +++ b/test/MC/ARM/basic-thumb-instructions.s @@ -435,3 +435,25 @@ _func: @ CHECK: stm r1!, {r2, r6} @ encoding: [0x44,0xc1] @ CHECK: stm r1!, {r1, r2, r3, r7} @ encoding: [0x8e,0xc1] + + +@------------------------------------------------------------------------------ +@ STR (immediate) +@------------------------------------------------------------------------------ + str r2, [r7] + str r2, [r7, #0] + str r5, [r1, #4] + str r3, [r7, #124] + +@ CHECK: str r2, [r7] @ encoding: [0x3a,0x60] +@ CHECK: str r2, [r7] @ encoding: [0x3a,0x60] +@ CHECK: str r5, [r1, #4] @ encoding: [0x4d,0x60] +@ CHECK: str r3, [r7, #124] @ encoding: [0xfb,0x67] + + +@------------------------------------------------------------------------------ +@ STR (register) +@------------------------------------------------------------------------------ + str r2, [r7, r3] + +@ CHECK: str r2, [r7, r3] @ encoding: [0xfa,0x50] diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s index 604127a642..9a4ddf1d9c 100644 --- a/test/MC/ARM/thumb-diagnostics.s +++ b/test/MC/ARM/thumb-diagnostics.s @@ -93,3 +93,18 @@ error: invalid operand for instruction @ CHECK-ERRORS: error: destination register must match source register @ CHECK-ERRORS: muls r1, r2, r3 @ CHECK-ERRORS: ^ + + +@ Out of range immediates for STR instruction. + str r2, [r7, #-1] + str r5, [r1, #3] + str r3, [r7, #128] +@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled +@ CHECK-ERRORS: str r2, [r7, #-1] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled +@ CHECK-ERRORS: str r5, [r1, #3] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled +@ CHECK-ERRORS: str r3, [r7, #128] +@ CHECK-ERRORS: ^ |