diff options
| author | Brian Gaeke <gaeke@uiuc.edu> | 2004-11-21 07:13:17 +0000 |
|---|---|---|
| committer | Brian Gaeke <gaeke@uiuc.edu> | 2004-11-21 07:13:17 +0000 |
| commit | 4351857d78c6604b1f5dd7a83be2a8cc869ae423 (patch) | |
| tree | c1f2b9403cabb21382fe089ebe562b93a3611a09 | |
| parent | 5f91de2b386d46c49893a5c9a0efc2e94b288119 (diff) | |
Add all the rest of the ADD and SUB variants, some of which are important for
64-bit support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18087 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 15 | ||||
| -rw-r--r-- | lib/Target/SparcV8/SparcV8InstrInfo.td | 15 |
2 files changed, 26 insertions, 4 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 02a1b1ef63..84d63e692d 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -116,13 +116,24 @@ def SRArr : F3_1<2, 0b100111, "sra">; def SRAri : F3_2<2, 0b100111, "sra">; // Section B.13 - Add Instructions, p. 108 -def ADDrr : F3_1<2, 0b000000, "add">; -def ADDri : F3_2<2, 0b000000, "add">; +def ADDrr : F3_1<2, 0b000000, "add">; +def ADDri : F3_2<2, 0b000000, "add">; +def ADDCCrr : F3_1<2, 0b010000, "addcc">; +def ADDCCri : F3_2<2, 0b010000, "addcc">; +def ADDXrr : F3_1<2, 0b001000, "addx">; +def ADDXri : F3_2<2, 0b001000, "addx">; +def ADDXCCrr: F3_1<2, 0b011000, "addxcc">; +def ADDXCCri: F3_2<2, 0b011000, "addxcc">; // Section B.15 - Subtract Instructions, p. 110 def SUBrr : F3_1<2, 0b000100, "sub">; +def SUBri : F3_2<2, 0b000100, "sub">; def SUBCCrr : F3_1<2, 0b010100, "subcc">; def SUBCCri : F3_2<2, 0b010100, "subcc">; +def SUBXrr : F3_1<2, 0b001100, "subx">; +def SUBXri : F3_2<2, 0b001100, "subx">; +def SUBXCCrr: F3_1<2, 0b011100, "subxcc">; +def SUBXCCri: F3_2<2, 0b011100, "subxcc">; // Section B.18 - Multiply Instructions, p. 113 def UMULrr : F3_1<2, 0b001010, "umul">; diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td index 02a1b1ef63..84d63e692d 100644 --- a/lib/Target/SparcV8/SparcV8InstrInfo.td +++ b/lib/Target/SparcV8/SparcV8InstrInfo.td @@ -116,13 +116,24 @@ def SRArr : F3_1<2, 0b100111, "sra">; def SRAri : F3_2<2, 0b100111, "sra">; // Section B.13 - Add Instructions, p. 108 -def ADDrr : F3_1<2, 0b000000, "add">; -def ADDri : F3_2<2, 0b000000, "add">; +def ADDrr : F3_1<2, 0b000000, "add">; +def ADDri : F3_2<2, 0b000000, "add">; +def ADDCCrr : F3_1<2, 0b010000, "addcc">; +def ADDCCri : F3_2<2, 0b010000, "addcc">; +def ADDXrr : F3_1<2, 0b001000, "addx">; +def ADDXri : F3_2<2, 0b001000, "addx">; +def ADDXCCrr: F3_1<2, 0b011000, "addxcc">; +def ADDXCCri: F3_2<2, 0b011000, "addxcc">; // Section B.15 - Subtract Instructions, p. 110 def SUBrr : F3_1<2, 0b000100, "sub">; +def SUBri : F3_2<2, 0b000100, "sub">; def SUBCCrr : F3_1<2, 0b010100, "subcc">; def SUBCCri : F3_2<2, 0b010100, "subcc">; +def SUBXrr : F3_1<2, 0b001100, "subx">; +def SUBXri : F3_2<2, 0b001100, "subx">; +def SUBXCCrr: F3_1<2, 0b011100, "subxcc">; +def SUBXCCri: F3_2<2, 0b011100, "subxcc">; // Section B.18 - Multiply Instructions, p. 113 def UMULrr : F3_1<2, 0b001010, "umul">; |