diff options
| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2003-07-25 21:00:13 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2003-07-25 21:00:13 +0000 |
| commit | 34a856749fd5563c201e91ce1cd2dfc345f6f49c (patch) | |
| tree | 9dca824ff5e5c5d9cd5a24e17aad29c42c941016 | |
| parent | b1e6f051108759c26d38ba0f64736f567d46f7a1 (diff) | |
Remove unused field. Change the way unused regs. are marked and
found to consider regType info (since multiple reg types may share
the same reg class, e.g., single and double on Sparc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7327 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/RegAlloc/PhyRegAlloc.h | 21 | ||||
| -rw-r--r-- | lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h | 21 |
2 files changed, 22 insertions, 20 deletions
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.h b/lib/CodeGen/RegAlloc/PhyRegAlloc.h index 731eef29c4..dc7772e4a2 100644 --- a/lib/CodeGen/RegAlloc/PhyRegAlloc.h +++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.h @@ -71,8 +71,6 @@ class PhyRegAlloc : public NonCopyable { AddedInstrns AddedInstrAtEntry; // to store instrns added at entry LoopInfo *LoopDepthCalc; // to calculate loop depths - std::vector<unsigned> ResColList; // A set of reserved regs if desired. - // currently not used public: PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi, @@ -87,11 +85,11 @@ public: // access to register classes by class ID // const RegClass* getRegClassByID(unsigned int id) const { - return RegClassList[id]; + return RegClassList[id]; + } + RegClass* getRegClassByID(unsigned int id) { + return RegClassList[id]; } - RegClass* getRegClassByID(unsigned int id) { - return RegClassList[id]; } - private: void addInterference(const Value *Def, const ValueSet *LVSet, @@ -134,11 +132,14 @@ private: std::vector<MachineInstr*>& MIBef, std::vector<MachineInstr*>& MIAft); - int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst, - const ValueSet *LVSetBef); + int getUnusedUniRegAtMI(RegClass *RC, const int RegType, + const MachineInstr *MInst, const ValueSet *LVSetBef); + + void setRelRegsUsedByThisInst(RegClass *RC, const int RegType, + const MachineInstr *MInst ); - void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst ); - int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst); + int getUniRegNotUsedByThisInst(RegClass *RC, const int RegType, + const MachineInstr *MInst); void addInterf4PseudoInstr(const MachineInstr *MInst); }; diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h index 731eef29c4..dc7772e4a2 100644 --- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h +++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h @@ -71,8 +71,6 @@ class PhyRegAlloc : public NonCopyable { AddedInstrns AddedInstrAtEntry; // to store instrns added at entry LoopInfo *LoopDepthCalc; // to calculate loop depths - std::vector<unsigned> ResColList; // A set of reserved regs if desired. - // currently not used public: PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi, @@ -87,11 +85,11 @@ public: // access to register classes by class ID // const RegClass* getRegClassByID(unsigned int id) const { - return RegClassList[id]; + return RegClassList[id]; + } + RegClass* getRegClassByID(unsigned int id) { + return RegClassList[id]; } - RegClass* getRegClassByID(unsigned int id) { - return RegClassList[id]; } - private: void addInterference(const Value *Def, const ValueSet *LVSet, @@ -134,11 +132,14 @@ private: std::vector<MachineInstr*>& MIBef, std::vector<MachineInstr*>& MIAft); - int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst, - const ValueSet *LVSetBef); + int getUnusedUniRegAtMI(RegClass *RC, const int RegType, + const MachineInstr *MInst, const ValueSet *LVSetBef); + + void setRelRegsUsedByThisInst(RegClass *RC, const int RegType, + const MachineInstr *MInst ); - void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst ); - int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst); + int getUniRegNotUsedByThisInst(RegClass *RC, const int RegType, + const MachineInstr *MInst); void addInterf4PseudoInstr(const MachineInstr *MInst); }; |