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| author | Chris Lattner <sabre@nondot.org> | 2006-12-05 18:25:10 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-12-05 18:25:10 +0000 |
| commit | 2beb136e0b7032db586e0ac52bcea742e5209dde (patch) | |
| tree | bf5b7d3bb67d4312c65b0694435d627dabbe7622 | |
| parent | 399610a2e601214520df42351b1287a142130058 (diff) | |
Add a perf optzn corresponding to PR1033.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32229 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/README-SSE.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/X86/README-SSE.txt b/lib/Target/X86/README-SSE.txt index 2685956dc1..b80661a5b7 100644 --- a/lib/Target/X86/README-SSE.txt +++ b/lib/Target/X86/README-SSE.txt @@ -18,6 +18,11 @@ Think about doing i64 math in SSE regs. //===---------------------------------------------------------------------===// +Bitcast to<->from SSE registers should use movd/movq instead of going through +the stack. Testcase here: CodeGen/X86/bitcast.ll + +//===---------------------------------------------------------------------===// + This testcase should have no SSE instructions in it, and only one load from a constant pool: |