diff options
author | Reed Kotler <rkotler@mips.com> | 2012-10-26 22:57:32 +0000 |
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committer | Reed Kotler <rkotler@mips.com> | 2012-10-26 22:57:32 +0000 |
commit | 25424154f4670c71150120416ff26300e46d393b (patch) | |
tree | 6492f49a12789880c110867acf608ec5758b40ad | |
parent | f29c05e883dc46f3f1be9b3a5f5c50ee73899380 (diff) |
implement mips16 tls global addr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166827 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Mips/Mips16InstrInfo.td | 8 | ||||
-rw-r--r-- | test/CodeGen/Mips/tls16.ll | 13 |
2 files changed, 21 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td index feffddc02e..89a3338250 100644 --- a/lib/Target/Mips/Mips16InstrInfo.td +++ b/lib/Target/Mips/Mips16InstrInfo.td @@ -1437,5 +1437,13 @@ def: SetCC_R16<setult, SltuCCRxRy16>; def: SetCC_I16<setult, immSExt16, SltiuCCRxImmX16>; +// wrapper_pic +class Wrapper16Pat<SDNode node, Instruction ADDiuOp, RegisterClass RC>: + Mips16Pat<(MipsWrapper RC:$gp, node:$in), + (ADDiuOp RC:$gp, node:$in)>; + + +def : Wrapper16Pat<tglobaltlsaddr, AddiuRxRxImmX16, CPU16Regs>; + def: Mips16Pat<(add CPU16Regs:$hi, (MipsLo tglobaladdr:$lo)), (AddiuRxRxImmX16 CPU16Regs:$hi, tglobaladdr:$lo)>; diff --git a/test/CodeGen/Mips/tls16.ll b/test/CodeGen/Mips/tls16.ll new file mode 100644 index 0000000000..861864bcfe --- /dev/null +++ b/test/CodeGen/Mips/tls16.ll @@ -0,0 +1,13 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16 + +@a = thread_local global i32 4, align 4 + +define i32 @foo() nounwind readonly { +entry: + %0 = load i32* @a, align 4 +; PIC16: lw ${{[0-9]+}}, %call16(__tls_get_addr)(${{[0-9]+}}) +; PIC16: addiu ${{[0-9]+}}, %tlsgd(a) + ret i32 %0 +} + + |