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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-10-27 17:41:27 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-10-27 17:41:27 +0000 |
commit | 163f67f4d98aab114cb9b04efd086f54f7688d0c (patch) | |
tree | aa36f1d6e9768bd4ec76efa4507eefc63c009944 | |
parent | badffcf8fddf3978acf9843a43e66766e9e830c6 (diff) |
Never attempt to join an early-clobber def with a regular kill.
This fixes PR14194.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166880 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/RegisterCoalescer.cpp | 14 | ||||
-rw-r--r-- | test/CodeGen/X86/crash.ll | 9 |
2 files changed, 23 insertions, 0 deletions
diff --git a/lib/CodeGen/RegisterCoalescer.cpp b/lib/CodeGen/RegisterCoalescer.cpp index 2ca67d6325..7592074478 100644 --- a/lib/CodeGen/RegisterCoalescer.cpp +++ b/lib/CodeGen/RegisterCoalescer.cpp @@ -1492,6 +1492,20 @@ JoinVals::analyzeValue(unsigned ValNo, JoinVals &Other) { if ((V.WriteLanes & OtherV.ValidLanes) == 0) return CR_Replace; + // If the other live range is killed by DefMI and the live ranges are still + // overlapping, it must be because we're looking at an early clobber def: + // + // %dst<def,early-clobber> = ASM %src<kill> + // + // In this case, it is illegal to merge the two live ranges since the early + // clobber def would clobber %src before it was read. + if (OtherLRQ.isKill()) { + // This case where the def doesn't overlap the kill is handled above. + assert(VNI->def.isEarlyClobber() && + "Only early clobber defs can overlap a kill"); + return CR_Impossible; + } + // VNI is clobbering live lanes in OtherVNI, but there is still the // possibility that no instructions actually read the clobbered lanes. // If we're clobbering all the lanes in OtherVNI, at least one must be read. diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll index 3eb7b37ee6..276d0db9a4 100644 --- a/test/CodeGen/X86/crash.ll +++ b/test/CodeGen/X86/crash.ll @@ -580,3 +580,12 @@ bb28: ; preds = %bb21 bb29: ; preds = %bb28, %bb26, %bb25, %bb21 unreachable } + +define void @pr14194() nounwind uwtable { + %tmp = load i64* undef, align 16 + %tmp1 = trunc i64 %tmp to i32 + %tmp2 = lshr i64 %tmp, 32 + %tmp3 = trunc i64 %tmp2 to i32 + %tmp4 = call { i32, i32 } asm sideeffect "", "=&r,=&r,r,r,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %tmp3, i32 undef, i32 %tmp3, i32 %tmp1) nounwind + ret void +} |