diff options
author | Owen Anderson <resistor@mac.com> | 2011-09-09 23:13:02 +0000 |
---|---|---|
committer | Owen Anderson <resistor@mac.com> | 2011-09-09 23:13:02 +0000 |
commit | 112fb73502d54dd7dd61ae2de24c92d4df181294 (patch) | |
tree | 0ec0016aaefab116b40e3d4e0d6c754698bba0dc | |
parent | cd4338fff5cc9427003766519bebcfa213b32d61 (diff) |
Fix an ambiguously nested if.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139431 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index ac1f6f905b..b087177a1a 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -412,12 +412,12 @@ ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, "ARM branch conditions have two components!"); if (FBB == 0) { - if (Cond.empty()) // Unconditional branch? + if (Cond.empty()) { // Unconditional branch? if (isThumb) BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB).addImm(ARMCC::AL).addReg(0); else BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB); - else + } else BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB) .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()); return 1; |