diff options
author | Jack Carter <jcarter@mips.com> | 2012-07-06 02:44:22 +0000 |
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committer | Jack Carter <jcarter@mips.com> | 2012-07-06 02:44:22 +0000 |
commit | 020f07f571fd1ae060becb2ecf8da2b220a9d47d (patch) | |
tree | 75224340d85168067ce8b6512fed78c93f1a5422 | |
parent | 87c06a843c279adf6750a044a5c54108397490fb (diff) |
Changes per review of commit 159787
Mips specific inline asm operand modifier D.
Comment changes and predicate change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159802 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Mips/MipsAsmPrinter.cpp | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/lib/Target/Mips/MipsAsmPrinter.cpp b/lib/Target/Mips/MipsAsmPrinter.cpp index 3be0b287d8..fc47ba5bfd 100644 --- a/lib/Target/Mips/MipsAsmPrinter.cpp +++ b/lib/Target/Mips/MipsAsmPrinter.cpp @@ -333,7 +333,6 @@ bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, O << "$0"; return false; } - // This will be shared with other cases in succeeding checkins case 'D': { // Second part of a double word register operand if (OpNum == 0) @@ -343,9 +342,10 @@ bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, return true; unsigned Flags = FlagsOP.getImm(); unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags); + // Number of registers represented by this operand. We are looking + // for 2 for 32 bit mode and 1 for 64 bit mode. if (NumVals != 2) { - if (!Subtarget->isGP32bit() && NumVals == 1 && MO.isReg()) { - // In 64 bit mode long longs are always just a single reg + if (Subtarget->isGP64bit() && NumVals == 1 && MO.isReg()) { unsigned Reg = MO.getReg(); O << '$' << MipsInstPrinter::getRegisterName(Reg); return false; @@ -354,7 +354,6 @@ bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, } unsigned RegOp; switch(ExtraCode[0]) { - // This will have other cases in succeeding checkins case 'D': RegOp = (!Subtarget->isGP32bit()) ? OpNum : OpNum + 1; break; @@ -368,8 +367,8 @@ bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, O << '$' << MipsInstPrinter::getRegisterName(Reg); return false; } - } // switch - } // if ExtraCode + } + } printOperand(MI, OpNum, O); return false; |