diff options
| author | Chris Lattner <sabre@nondot.org> | 2007-02-15 18:17:56 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-02-15 18:17:56 +0000 |
| commit | 0152829e89427a6c6cb22ff54dd580ccc4f4cc2a (patch) | |
| tree | 01bcfc9db7269b4bc46110db615caaaf830596ab | |
| parent | 506e89949024a055fb9fc7258e96bf4b581135e4 (diff) | |
Apply B Scott Michel's patch for PR1184, which improves diagnostics in an
abort case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34306 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index f6e9b2c88b..868d3335a1 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -302,8 +302,22 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDOperand Op, const TargetRegisterClass *RC = getInstrOperandRegClass(MRI, TII, II, IIOpNum); assert(RC && "Don't have operand info for this instruction!"); - assert(RegMap->getRegClass(VReg) == RC && - "Register class of operand and regclass of use don't agree!"); + const TargetRegisterClass *VRC = RegMap->getRegClass(VReg); + if (VRC != RC) { + cerr << "Register class of operand and regclass of use don't agree!\n"; +#ifndef NDEBUG + cerr << "Operand = " << IIOpNum << "\n"; + cerr << "Op->Val = "; Op.Val->dump(0); cerr << "\n"; + cerr << "MI = "; MI->print(cerr); + cerr << "VReg = " << VReg << "\n"; + cerr << "VReg RegClass size = " << VRC->getSize() + << ", align = " << VRC->getAlignment() << "\n"; + cerr << "Expected RegClass size = " << RC->getSize() + << ", align = " << RC->getAlignment() << "\n"; +#endif + cerr << "Fatal error, aborting.\n"; + abort(); + } } } else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |