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authorChad Rosier <mcrosier@apple.com>2012-09-03 03:16:09 +0000
committerChad Rosier <mcrosier@apple.com>2012-09-03 03:16:09 +0000
commitc4d2560a2010456f4eea0007eb71829d5668e7dd (patch)
tree6211f517def1a927c21d32790d7d4e9e89ad90d3
parent8a04e51d861032fe9e62612cf3298cd8bc18cc2e (diff)
Removed unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163104 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/MC/MCTargetAsmParser.h2
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp3
-rw-r--r--lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp3
-rw-r--r--lib/Target/X86/AsmParser/X86AsmParser.cpp27
-rw-r--r--utils/TableGen/AsmMatcherEmitter.cpp9
5 files changed, 20 insertions, 24 deletions
diff --git a/include/llvm/MC/MCTargetAsmParser.h b/include/llvm/MC/MCTargetAsmParser.h
index 40daab888c..35c4acd5d2 100644
--- a/include/llvm/MC/MCTargetAsmParser.h
+++ b/include/llvm/MC/MCTargetAsmParser.h
@@ -85,7 +85,7 @@ public:
/// On failure, the target parser is responsible for emitting a diagnostic
/// explaining the match failure.
virtual bool
- MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
+ MatchInstruction(SMLoc IDLoc, unsigned &Kind,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCInst> &MCInsts,
unsigned &OrigErrorInfo,
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index ebb0f8d8de..fe11bec93f 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -7457,11 +7457,10 @@ MatchAndEmitInstruction(SMLoc IDLoc,
MCStreamer &Out) {
MCInst Inst;
unsigned Kind;
- unsigned Opcode;
unsigned ErrorInfo;
unsigned MatchResult;
- MatchResult = MatchInstructionImpl(Operands, Kind, Opcode, Inst, ErrorInfo);
+ MatchResult = MatchInstructionImpl(Operands, Kind, Inst, ErrorInfo);
switch (MatchResult) {
default: break;
case Match_Success:
diff --git a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
index 9e6d397d45..f9796a641c 100644
--- a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
+++ b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
@@ -318,10 +318,9 @@ MatchAndEmitInstruction(SMLoc IDLoc,
MCStreamer &Out) {
MCInst Inst;
unsigned Kind;
- unsigned Opcode;
unsigned ErrorInfo;
- switch (MatchInstructionImpl(Operands, Kind, Opcode, Inst, ErrorInfo)) {
+ switch (MatchInstructionImpl(Operands, Kind, Inst, ErrorInfo)) {
default: break;
case Match_Success:
Out.EmitInstruction(Inst);
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 1917721194..3a1aa41541 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -67,7 +67,7 @@ private:
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out);
- bool MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
+ bool MatchInstruction(SMLoc IDLoc, unsigned &Kind,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCInst> &MCInsts,
unsigned &OrigErrorInfo,
@@ -1517,11 +1517,10 @@ MatchAndEmitInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
unsigned Kind;
- unsigned Opcode;
unsigned ErrorInfo;
SmallVector<MCInst, 2> Insts;
- bool Error = MatchInstruction(IDLoc, Kind, Opcode, Operands, Insts,
+ bool Error = MatchInstruction(IDLoc, Kind, Operands, Insts,
ErrorInfo);
if (!Error)
for (unsigned i = 0, e = Insts.size(); i != e; ++i)
@@ -1530,7 +1529,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
}
bool X86AsmParser::
-MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
+MatchInstruction(SMLoc IDLoc, unsigned &Kind,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCInst> &MCInsts, unsigned &OrigErrorInfo,
bool matchingInlineAsm) {
@@ -1572,7 +1571,7 @@ MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
MCInst Inst;
// First, try a direct match.
- switch (MatchInstructionImpl(Operands, Kind, Opcode, Inst, OrigErrorInfo,
+ switch (MatchInstructionImpl(Operands, Kind, Inst, OrigErrorInfo,
isParsingIntelSyntax())) {
default: break;
case Match_Success:
@@ -1620,19 +1619,19 @@ MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
Tmp[Base.size()] = Suffixes[0];
unsigned ErrorInfoIgnore;
unsigned Match1, Match2, Match3, Match4;
- unsigned tKind, tOpcode;
+ unsigned tKind;
- Match1 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
- if (Match1 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
+ Match1 = MatchInstructionImpl(Operands, tKind, Inst, ErrorInfoIgnore);
+ if (Match1 == Match_Success) Kind = tKind;
Tmp[Base.size()] = Suffixes[1];
- Match2 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
- if (Match2 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
+ Match2 = MatchInstructionImpl(Operands, tKind, Inst, ErrorInfoIgnore);
+ if (Match2 == Match_Success) Kind = tKind;
Tmp[Base.size()] = Suffixes[2];
- Match3 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
- if (Match3 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
+ Match3 = MatchInstructionImpl(Operands, tKind, Inst, ErrorInfoIgnore);
+ if (Match3 == Match_Success) Kind = tKind;
Tmp[Base.size()] = Suffixes[3];
- Match4 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
- if (Match4 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
+ Match4 = MatchInstructionImpl(Operands, tKind, Inst, ErrorInfoIgnore);
+ if (Match4 == Match_Success) Kind = tKind;
// Restore the old token.
Op->setTokenValue(Base);
diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp
index 32c0f2e4d4..86c90db92e 100644
--- a/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/utils/TableGen/AsmMatcherEmitter.cpp
@@ -2587,8 +2587,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << " bool MnemonicIsValid(StringRef Mnemonic);\n";
OS << " unsigned MatchInstructionImpl(\n"
<< " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"
- << " unsigned &Kind, unsigned &Opcode, MCInst &Inst, "
- << "unsigned &ErrorInfo,\n unsigned VariantID = 0);\n";
+ << " unsigned &Kind, MCInst &Inst, "
+ << "unsigned &ErrorInfo,\n unsigned VariantID = 0);\n";
if (Info.OperandMatchInfo.size()) {
OS << "\n enum OperandMatchResultTy {\n";
@@ -2768,8 +2768,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
<< Target.getName() << ClassName << "::\n"
<< "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
<< " &Operands,\n";
- OS << " unsigned &Kind, unsigned &Opcode, MCInst &Inst,";
- OS << "\n unsigned &ErrorInfo, unsigned VariantID) {\n";
+ OS << " unsigned &Kind, MCInst &Inst, unsigned ";
+ OS << "&ErrorInfo,\n unsigned VariantID) {\n";
OS << " // Eliminate obvious mismatches.\n";
OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
@@ -2887,7 +2887,6 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << " " << InsnCleanupFn << "(Inst);\n";
OS << " Kind = it->ConvertFn;\n";
- OS << " Opcode = it->Opcode;\n";
OS << " return Match_Success;\n";
OS << " }\n\n";