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| author | Hal Finkel <hfinkel@anl.gov> | 2013-04-01 18:42:58 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-04-01 18:42:58 +0000 |
| commit | a1646ceb9a5da080607e503c8bd36241aa465613 (patch) | |
| tree | 02bef452d22f02c7d5f2f02ba418c4ce75d28e55 | |
| parent | 6c81b118caf83e579aaf85c7dca9aebc389abae9 (diff) | |
Fix a bad assert in PPCTargetLowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178489 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/float-to-int.ll | 1 |
2 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 9c686cb946..2cceb3d312 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -4736,8 +4736,8 @@ SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG, dl, MVT::f64, Src); break; case MVT::i64: - assert((Op.getOpcode() == ISD::SINT_TO_FP || PPCSubTarget.hasFPCVT()) && - "i64 UINT_TO_FP is supported only with FPCVT"); + assert((Op.getOpcode() == ISD::FP_TO_SINT || PPCSubTarget.hasFPCVT()) && + "i64 FP_TO_UINT is supported only with FPCVT"); Tmp = DAG.getNode(Op.getOpcode()==ISD::FP_TO_SINT ? PPCISD::FCTIDZ : PPCISD::FCTIDUZ, dl, MVT::f64, Src); diff --git a/test/CodeGen/PowerPC/float-to-int.ll b/test/CodeGen/PowerPC/float-to-int.ll index ebd0903358..39cd4f929f 100644 --- a/test/CodeGen/PowerPC/float-to-int.ll +++ b/test/CodeGen/PowerPC/float-to-int.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" |