diff options
author | Reed Kotler <rkotler@mips.com> | 2012-12-20 06:57:00 +0000 |
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committer | Reed Kotler <rkotler@mips.com> | 2012-12-20 06:57:00 +0000 |
commit | 0fd831325006d3d3f73022b4908ceacfbf7aa262 (patch) | |
tree | b11607bc4e72ecc2f6850e4df6aab59e6a01aed7 | |
parent | 82a36e2b593c84a97a69a50ce2323c19512d543b (diff) |
There is one more patch to finish large frames. Make sure we assert
on code that has large frames which will not yet compile correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170673 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Mips/Mips16RegisterInfo.cpp | 4 | ||||
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips16RegisterInfo.cpp b/lib/Target/Mips/Mips16RegisterInfo.cpp index ff0f5a0dfb..3af62a17da 100644 --- a/lib/Target/Mips/Mips16RegisterInfo.cpp +++ b/lib/Target/Mips/Mips16RegisterInfo.cpp @@ -146,6 +146,10 @@ void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II, DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n"); + if (!MI.isDebugValue() && ( ((FrameReg != Mips::SP) && !isInt<16>(Offset)) || + ((FrameReg == Mips::SP) && !isInt<15>(Offset)) )) { + assert(false && "frame offset does not fit in instruction"); + } MI.getOperand(OpNo).ChangeToRegister(FrameReg, false); MI.getOperand(OpNo + 1).ChangeToImmediate(Offset); diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index af9df4ba65..43a6b82a57 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -298,6 +298,10 @@ def HI16 : SDNodeXForm<imm, [{ // e.g. addi, andi def immSExt16 : PatLeaf<(imm), [{ return isInt<16>(N->getSExtValue()); }]>; +// Node immediate fits as 15-bit sign extended on target immediate. +// e.g. addi, andi +def immSExt15 : PatLeaf<(imm), [{ return isInt<15>(N->getSExtValue()); }]>; + // Node immediate fits as 16-bit zero extended on target immediate. // The LO16 param means that only the lower 16 bits of the node // immediate are caught. |