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| author | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-27 18:35:54 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-27 18:35:54 +0000 |
| commit | f228fa05803e84f0439d1793125619218fb24154 (patch) | |
| tree | ce7e6dad83898bfb71341c218fcd04542f703dde | |
| parent | fa20a6dfd78c0f53c6a2c69ff1de97b544a303ab (diff) | |
Add COND_BRANCH pseudo instruction, patch by Nate Begeman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15283 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 02e33f327c..0a73c66036 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -1297,6 +1297,7 @@ def ANDC : PPC32InstPattern5 <"andc", Gpr, Gpr, Gpr, 31, 120, 0, 0>; def ANDCo : PPC32InstPattern5 <"andc.", Gpr, Gpr, Gpr, 31, 121, 0, 0>; let isBranch = 1, isTerminator = 1 in { + def COND_BRANCH : PPC32InstPatternPseudo<"COND_BRANCH", Pseudo>; def B : PPC32InstPattern6 <"b", PCRelimm24, 18, 0, 0, 0>; def BA : PPC32InstPattern6 <"ba", Imm24, 18, 0, 0, 0>; def BC : PPC32InstPattern7 <"bc", Imm5, Imm5, PCRelimm14, 16, 0, 0, 0>; |