diff options
| author | Jim Grosbach <grosbach@apple.com> | 2011-12-05 22:27:04 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-12-05 22:27:04 +0000 |
| commit | 713c70238c6d150d2cd458b07ab35932fafe508e (patch) | |
| tree | 017102557461bd2a43b88950aaacc2ad9a42db3e | |
| parent | 6e507c645d469f525a46c4280cc29bd3078bb9d0 (diff) | |
Tweak ADDrr fix. Bad check for explicit .w
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145863 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 4 | ||||
| -rw-r--r-- | test/MC/ARM/mode-switch.s | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index c1a745216e..07679a60ff 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5245,8 +5245,8 @@ processInstruction(MCInst &Inst, // 'as' behaviour. Make sure the wide encoding wasn't explicit. if (Inst.getOperand(0).getReg() != Inst.getOperand(1).getReg() || Inst.getOperand(5).getReg() != 0 || - (static_cast<ARMOperand*>(Operands[2])->isToken() && - static_cast<ARMOperand*>(Operands[2])->getToken() == ".w")) + (static_cast<ARMOperand*>(Operands[3])->isToken() && + static_cast<ARMOperand*>(Operands[3])->getToken() == ".w")) break; MCInst TmpInst; TmpInst.setOpcode(ARM::tADDhirr); diff --git a/test/MC/ARM/mode-switch.s b/test/MC/ARM/mode-switch.s index 99bd4b5310..9d4995439e 100644 --- a/test/MC/ARM/mode-switch.s +++ b/test/MC/ARM/mode-switch.s @@ -4,7 +4,7 @@ .code 16 add.w r0, r0, r1 -@ CHECK: add r0, r1 @ encoding: [0x08,0x44] +@ CHECK: add.w r0, r0, r1 @ encoding: [0x00,0xeb,0x01,0x00] .code 32 add r0, r0, r1 |