diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-02-02 03:13:40 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-02-02 03:13:40 +0000 |
| commit | 590baca06c1e87a18070d606b36e0985e9b61afc (patch) | |
| tree | 5ce9a71b562aeb8b3d38816e20260934d2fcc902 | |
| parent | 1ad175e7e0547520eec8ff5ec39a65ad8fba00c3 (diff) | |
Expand EHSELECTION and EHSELECTION nodes. Set the correct exception pointer and
selector registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149584 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 2f366b3996..227e6cc140 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -197,7 +197,9 @@ MipsTargetLowering(MipsTargetMachine &TM) setOperationAction(ISD::FMA, MVT::f64, Expand); setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); + setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand); setOperationAction(ISD::EHSELECTION, MVT::i32, Expand); + setOperationAction(ISD::EHSELECTION, MVT::i64, Expand); setOperationAction(ISD::VAARG, MVT::Other, Expand); setOperationAction(ISD::VACOPY, MVT::Other, Expand); @@ -248,8 +250,8 @@ MipsTargetLowering(MipsTargetMachine &TM) setStackPointerRegisterToSaveRestore(HasMips64 ? Mips::SP_64 : Mips::SP); computeRegisterProperties(); - setExceptionPointerRegister(Mips::A0); - setExceptionSelectorRegister(Mips::A1); + setExceptionPointerRegister(IsN64 ? Mips::A0_64 : Mips::A0); + setExceptionSelectorRegister(IsN64 ? Mips::A1_64 : Mips::A1); } bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const { |