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author | Tom Stellard <thomas.stellard@amd.com> | 2013-05-06 23:02:00 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-05-06 23:02:00 +0000 |
commit | 354769ba3206e9c58f8842d3852ca85a86794b8f (patch) | |
tree | 0cc124266e73d90eb615096e079cc9482c90e822 | |
parent | 942940a3262242ac55efea88f818959f28d18bba (diff) |
R600/SI: Add pattern for AMDGPU.trunc intrinsic
Patch by: Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181263 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/R600/SIInstructions.td | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index fcae109fea..691a040645 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -624,7 +624,9 @@ defm V_MOV_FED_B32 : VOP1_32 <0x00000009, "V_MOV_FED_B32", []>; defm V_FRACT_F32 : VOP1_32 <0x00000020, "V_FRACT_F32", [(set f32:$dst, (AMDGPUfract f32:$src0))] >; -defm V_TRUNC_F32 : VOP1_32 <0x00000021, "V_TRUNC_F32", []>; +defm V_TRUNC_F32 : VOP1_32 <0x00000021, "V_TRUNC_F32", + [(set f32:$dst, (int_AMDGPU_trunc f32:$src0))] +>; defm V_CEIL_F32 : VOP1_32 <0x00000022, "V_CEIL_F32", [(set f32:$dst, (fceil f32:$src0))] >; |