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| author | Bill Wendling <isanbard@gmail.com> | 2007-06-16 06:17:31 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2007-06-16 06:17:31 +0000 |
| commit | e81369f2a566b4ac482b0b39814af5a3ba80eac8 (patch) | |
| tree | d6f5842e81625b353de96a2c819925568ff42d2c | |
| parent | 32bc789b6c46cee1bde37b7488d02b2febcb9102 (diff) | |
Fix a failure to bit_convert from integer GPR to MMX register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37611 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index f8b6cea7c0..b9be10fb22 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -394,6 +394,8 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i16, Custom); setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i32, Custom); setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v1i64, Custom); + + setOperationAction(ISD::BIT_CONVERT, MVT::i64, Expand); } if (Subtarget->hasSSE1()) { |