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authorJim Grosbach <grosbach@apple.com>2010-06-22 20:52:02 +0000
committerJim Grosbach <grosbach@apple.com>2010-06-22 20:52:02 +0000
commitdd11ee2273c946add077ec79abbb3ac9a44178b3 (patch)
tree05323f4bb6449eb73ce6464a805eba2b341b20c6
parentf2937ac4eddb5ced78a1d73206de020c6d9e440f (diff)
fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106574 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index d99481c0e2..4feee156c4 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -9843,7 +9843,7 @@ static SDValue PerformVZEXT_MOVLCombine(SDNode *N, SelectionDAG &DAG) {
// On X86 and X86-64, atomic operations are lowered to locked instructions.
// Locked instructions, in turn, have implicit fence semantics (all memory
-// operations are flushed before issuing the locked instruction, and the
+// operations are flushed before issuing the locked instruction, and they
// are not buffered), so we can fold away the common pattern of
// fence-atomic-fence.
static SDValue PerformMEMBARRIERCombine(SDNode* N, SelectionDAG &DAG) {