diff options
| author | Nate Begeman <natebegeman@mac.com> | 2004-09-27 05:08:17 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2004-09-27 05:08:17 +0000 |
| commit | da721e74f87c3098bdb1373a7a1c7aef4cf7d574 (patch) | |
| tree | f0062b5b3b60507970f86ad93d3d4a51078f4936 | |
| parent | c6e743049983dca1c6904610fa3cb78bda39d67c (diff) | |
Correct some BuildMI arguments for the upcoming simple scheduler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPC32ISelSimple.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPC64RegisterInfo.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index 057615d509..c8fde63e93 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -557,7 +557,7 @@ void PPC32ISel::copyGlobalBaseToRegister(MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI = FirstMBB.begin(); GlobalBaseReg = makeAnotherReg(Type::IntTy); BuildMI(FirstMBB, MBBI, PPC::MovePCtoLR, 0, PPC::LR); - BuildMI(FirstMBB, MBBI, PPC::MFLR, 0, GlobalBaseReg).addReg(PPC::LR); + BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg).addReg(PPC::LR); GlobalBaseInitialized = true; } // Emit our copy of GlobalBaseReg to the destination register in the diff --git a/lib/Target/PowerPC/PPC64RegisterInfo.cpp b/lib/Target/PowerPC/PPC64RegisterInfo.cpp index 1871c2e315..9375c2c510 100644 --- a/lib/Target/PowerPC/PPC64RegisterInfo.cpp +++ b/lib/Target/PowerPC/PPC64RegisterInfo.cpp @@ -78,7 +78,7 @@ PPC64RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, const TargetRegisterClass *RC = getRegClass(SrcReg); unsigned OC = Opcode[getIdx(RC)]; if (SrcReg == PPC::LR) { - BuildMI(MBB, MI, PPC::MFLR, 0, PPC::R11); + BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11).addReg(PPC::LR); BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0); addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx); } else { diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 321a44939b..a7b5cb5bad 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -78,7 +78,7 @@ PPC32RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, unsigned OC = Opcode[getIdx(RC)]; if (SrcReg == PPC::LR) { - BuildMI(MBB, MI, PPC::MFLR, 0, PPC::R11); + BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11).addReg(PPC::LR); BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0); addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx); } else { |