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| author | Evan Cheng <evan.cheng@apple.com> | 2007-05-29 23:34:19 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-05-29 23:34:19 +0000 |
| commit | c6f2f6fbb9e6a30ab83fe47c70150444eddf34bb (patch) | |
| tree | f7574d84604ba211a076f0378a253190350929db | |
| parent | 2c0c51593d3695f5d3d4762558ab7b8e937c8f67 (diff) | |
For VFP2 fldm, fstm instructions, the condition code is printed after the address mode and size specifier. e.g. fstmiaseq, not fstmeqias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37351 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrVFP.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td index f183891a5d..c0428e96b3 100644 --- a/lib/Target/ARM/ARMInstrVFP.td +++ b/lib/Target/ARM/ARMInstrVFP.td @@ -108,21 +108,21 @@ def FSTS : ASI5<(ops SPR:$src, addrmode5:$addr), let isLoad = 1 in { def FLDMD : AXDI5<(ops addrmode5:$addr, pred:$p, reglist:$dst1, variable_ops), - "fldm${p}${addr:submode}d ${addr:base}, $dst1", + "fldm${addr:submode}d${p} ${addr:base}, $dst1", []>; def FLDMS : AXSI5<(ops addrmode5:$addr, pred:$p, reglist:$dst1, variable_ops), - "fldm${p}${addr:submode}s ${addr:base}, $dst1", + "fldm${addr:submode}s${p} ${addr:base}, $dst1", []>; } // isLoad let isStore = 1 in { def FSTMD : AXDI5<(ops addrmode5:$addr, pred:$p, reglist:$src1, variable_ops), - "fstm${p}${addr:submode}d ${addr:base}, $src1", + "fstm${addr:submode}d${p} ${addr:base}, $src1", []>; def FSTMS : AXSI5<(ops addrmode5:$addr, pred:$p, reglist:$src1, variable_ops), - "fstm${p}${addr:submode}s ${addr:base}, $src1", + "fstm${addr:submode}s${p} ${addr:base}, $src1", []>; } // isStore |