diff options
| author | Cameron Zwarich <zwarich@apple.com> | 2011-04-15 20:45:00 +0000 |
|---|---|---|
| committer | Cameron Zwarich <zwarich@apple.com> | 2011-04-15 20:45:00 +0000 |
| commit | b485de5d8c3fe0c62c0b07f63f64bd10f6803c17 (patch) | |
| tree | a86943abbfd5ec5e3a1049c6e36450d0eef21c76 | |
| parent | ed7cd9610a5d4f42b24b2aa2eded2b3ff9bd2858 (diff) | |
The AND instruction leaves the V flag unmodified, so it falls victim to the same
problem as all of the other instructions we fold with CMPs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129602 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 13 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2011-04-15-AndVFlagPeepholeBug.ll | 22 |
2 files changed, 28 insertions, 7 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index e2eeeed8ce..465d6122aa 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1638,7 +1638,11 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, case ARM::t2SUBrr: case ARM::t2SUBri: case ARM::t2SBCrr: - case ARM::t2SBCri: { + case ARM::t2SBCri: + case ARM::ANDrr: + case ARM::ANDri: + case ARM::t2ANDrr: + case ARM::t2ANDri: { // Scan forward for the use of CPSR, if it's a conditional code requires // checking of V bit, then this is not safe to do. If we can't find the // CPSR use (i.e. used in another block), then it's not safe to perform @@ -1677,18 +1681,13 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, if (!isSafe) return false; - // fallthrough - } - case ARM::ANDrr: - case ARM::ANDri: - case ARM::t2ANDrr: - case ARM::t2ANDri: // Toggle the optional operand to CPSR. MI->getOperand(5).setReg(ARM::CPSR); MI->getOperand(5).setIsDef(true); CmpInstr->eraseFromParent(); return true; } + } return false; } diff --git a/test/CodeGen/ARM/2011-04-15-AndVFlagPeepholeBug.ll b/test/CodeGen/ARM/2011-04-15-AndVFlagPeepholeBug.ll new file mode 100644 index 0000000000..e712e08ddb --- /dev/null +++ b/test/CodeGen/ARM/2011-04-15-AndVFlagPeepholeBug.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 | FileCheck %s + +; CHECK: _f +; CHECK-NOT: ands +; CHECK: cmp +; CHECK: blxle _g + +define i32 @f(i32 %a, i32 %b) nounwind ssp { +entry: + %and = and i32 %b, %a + %cmp = icmp slt i32 %and, 1 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + tail call void (...)* @g(i32 %a, i32 %b) nounwind + br label %if.end + +if.end: ; preds = %if.then, %entry + ret i32 %and +} + +declare void @g(...) |