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| author | Craig Topper <craig.topper@gmail.com> | 2011-09-14 06:41:26 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-09-14 06:41:26 +0000 |
| commit | a08e255e1e47d732b31262a95a8ba810f85735c4 (patch) | |
| tree | aec33b9f13f500a88e44d79afe35ad0e6e469170 | |
| parent | 3bb43a829e03ed8ea671f5bc331772ef7afc3313 (diff) | |
Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139691 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 4 | ||||
| -rw-r--r-- | test/MC/Disassembler/X86/simple-tests.txt | 18 | ||||
| -rw-r--r-- | utils/TableGen/X86RecognizableInstr.cpp | 5 |
3 files changed, 20 insertions, 7 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 6b350a0039..0afc5399e1 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -5490,7 +5490,7 @@ multiclass sse41_fp_unop_rm<bits<8> opcps, bits<8> opcpd, string OpcodeStr, // Vector intrinsic operation, mem def PSm : Ii8<opcps, MRMSrcMem, - (outs RC:$dst), (ins f256mem:$src1, i32i8imm:$src2), + (outs RC:$dst), (ins x86memop:$src1, i32i8imm:$src2), !strconcat(OpcodeStr, "ps\t{$src2, $src1, $dst|$dst, $src1, $src2}"), [(set RC:$dst, @@ -5508,7 +5508,7 @@ multiclass sse41_fp_unop_rm<bits<8> opcps, bits<8> opcpd, string OpcodeStr, // Vector intrinsic operation, mem def PDm : SS4AIi8<opcpd, MRMSrcMem, - (outs RC:$dst), (ins f256mem:$src1, i32i8imm:$src2), + (outs RC:$dst), (ins x86memop:$src1, i32i8imm:$src2), !strconcat(OpcodeStr, "pd\t{$src2, $src1, $dst|$dst, $src1, $src2}"), [(set RC:$dst, diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index 67a1c44d02..55ac9ab168 100644 --- a/test/MC/Disassembler/X86/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -272,3 +272,21 @@ # CHECK: vblendvps %xmm4, %xmm1, %xmm2, %xmm3 0xc4 0xe3 0x69 0x4a 0xd9 0x41 + +# CHECK: vroundpd $0, %xmm0, %xmm0 +0xc4 0xe3 0x79 0x09 0xc0 0x00 + +# CHECK: vroundps $0, %xmm0, %xmm0 +0xc4 0xe3 0x79 0x08 0xc0 0x00 + +# CHECK: vroundpd $0, %ymm0, %ymm0 +0xc4 0xe3 0x7d 0x09 0xc0 0x00 + +# CHECK: vroundps $0, %ymm0, %ymm0 +0xc4 0xe3 0x7d 0x08 0xc0 0x00 + +# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0 +0xc4 0xe3 0x79 0x0a 0xc0 0x00 + +# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0 +0xc4 0xe3 0x79 0x0b 0xc0 0x00 diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index 5338d56a78..ab40222898 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -352,11 +352,6 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const { return FILTER_STRONG; - // TEMPORARY pending bug fixes - - if (Name.find("VROUND") != Name.npos) - return FILTER_STRONG; - // Filter out artificial instructions if (Name.find("TAILJMP") != Name.npos || |