diff options
| author | Chris Lattner <sabre@nondot.org> | 2010-12-05 07:49:54 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-12-05 07:49:54 +0000 |
| commit | 9637d5b22ec655d9b2f6cdb5fb23b0ce0ec9c8a5 (patch) | |
| tree | d6a13f219ef8586ab4e90dc307244aeedf94f3e4 | |
| parent | b20e0b1fddfd9099e12b84a71fbc8ccff5a12b10 (diff) | |
Teach X86ISelLowering that the second result of X86ISD::UMUL is a flags
result. This allows us to compile:
void *test12(long count) {
return new int[count];
}
into:
test12:
movl $4, %ecx
movq %rdi, %rax
mulq %rcx
movq $-1, %rdi
cmovnoq %rax, %rdi
jmp __Znam ## TAILCALL
instead of:
test12:
movl $4, %ecx
movq %rdi, %rax
mulq %rcx
seto %cl
testb %cl, %cl
movq $-1, %rdi
cmoveq %rax, %rdi
jmp __Znam
Of course it would be even better if the regalloc inverted the cmov to 'cmovoq',
which would eliminate the need for the 'movq %rdi, %rax'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120936 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/X86/select.ll | 22 |
2 files changed, 25 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 58b8cb1112..6e1420cb75 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -7207,6 +7207,9 @@ static bool isX86LogicalCmp(SDValue Op) { Opc == X86ISD::AND)) return true; + if (Op.getResNo() == 2 && Opc == X86ISD::UMUL) + return true; + return false; } diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll index b2f87bc2cf..9df23f1746 100644 --- a/test/CodeGen/X86/select.ll +++ b/test/CodeGen/X86/select.ll @@ -178,4 +178,26 @@ define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { } +declare noalias i8* @_Znam(i64) noredzone + +define noalias i8* @test12(i64 %count) nounwind ssp noredzone { +entry: + %A = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %count, i64 4) + %B = extractvalue { i64, i1 } %A, 1 + %C = extractvalue { i64, i1 } %A, 0 + %D = select i1 %B, i64 -1, i64 %C + %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone + ret i8* %call +; CHECK: test12: +; CHECK: mulq +; CHECK: movq $-1, %rdi +; CHECK: cmovnoq %rax, %rdi +; CHECK: jmp __Znam +} + +declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone + + + + |