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authorCameron Zwarich <zwarich@apple.com>2010-12-28 23:02:56 +0000
committerCameron Zwarich <zwarich@apple.com>2010-12-28 23:02:56 +0000
commit438e25ccdcd8673b1ff8d54ee80a5894a29b2590 (patch)
tree8c2d1d66fc9c88a0635ef3282e65cf7010451c4c
parentf661277a9b26590648aca585c0572f200470290d (diff)
Revert the optimization in r122596. It is correct for all current targets, but
it relies on assumptions that may not be true in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122608 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/StrongPHIElimination.cpp9
1 files changed, 8 insertions, 1 deletions
diff --git a/lib/CodeGen/StrongPHIElimination.cpp b/lib/CodeGen/StrongPHIElimination.cpp
index f84fdbe5bc..5713e6aed2 100644
--- a/lib/CodeGen/StrongPHIElimination.cpp
+++ b/lib/CodeGen/StrongPHIElimination.cpp
@@ -472,9 +472,16 @@ StrongPHIElimination::SplitInterferencesForBasicBlock(
for (MachineBasicBlock::iterator BBI = MBB.begin(), BBE = MBB.end();
BBI != BBE; ++BBI) {
for (MachineInstr::const_mop_iterator I = BBI->operands_begin(),
- E = BBI->operands_end(); I != E && I->isReg() && I->isDef(); ++I) {
+ E = BBI->operands_end(); I != E; ++I) {
const MachineOperand& MO = *I;
+ // FIXME: This would be faster if it were possible to bail out of checking
+ // an instruction's operands after the explicit defs, but this is incorrect
+ // for variadic instructions, which may appear before register allocation
+ // in the future.
+ if (!MO.isReg() || !MO.isDef())
+ continue;
+
unsigned DestReg = MO.getReg();
if (!DestReg || !TargetRegisterInfo::isVirtualRegister(DestReg))
continue;