diff options
author | Dan Gohman <gohman@apple.com> | 2009-10-05 15:42:08 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-10-05 15:42:08 +0000 |
commit | 21313bc62f285d89aa0311ab42ad3a108432f4af (patch) | |
tree | f27969ae83ddb4cc982b59454cf2b19e0b5bcb4e | |
parent | e2d0af4d7802a36e183897cc061747ba88819226 (diff) |
Add RIP to GR64_NOREX. This fixed a MachineVerifier error when RIP
is used in an operand which requires GR64_NOREX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83307 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.td | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index 469a3d88e7..7bf074d499 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -555,7 +555,7 @@ def GR32_NOREX : RegisterClass<"X86", [i32], 32, } // GR64_NOREX - GR64 registers which do not require a REX prefix. def GR64_NOREX : RegisterClass<"X86", [i64], 64, - [RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP]> { + [RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP]> { let SubRegClassList = [GR8_NOREX, GR8_NOREX, GR16_NOREX, GR32_NOREX]; let MethodProtos = [{ iterator allocation_order_end(const MachineFunction &MF) const; @@ -567,11 +567,11 @@ def GR64_NOREX : RegisterClass<"X86", [i64], 64, const TargetRegisterInfo *RI = TM.getRegisterInfo(); // Does the function dedicate RBP to being a frame ptr? if (RI->hasFP(MF)) - // If so, don't allocate RSP or RBP. - return end() - 2; + // If so, don't allocate RIP, RSP or RBP. + return end() - 3; else - // If not, just don't allocate RSP. - return end() - 1; + // If not, just don't allocate RIP or RSP. + return end() - 2; } }]; } |