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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-25 20:00:32 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-25 20:00:32 +0000 |
| commit | 1e93b242461fcb01249d5f925e90f3eb3c2344ad (patch) | |
| tree | 6e23d933704f5fd5c3d410736f62d280f26bccc5 | |
| parent | b024572444d19a6e06624328ea6a75a2f3342eaf (diff) | |
Tidy up a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135945 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index ec6052dfd7..77bb7439df 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -419,15 +419,8 @@ def shift_imm : Operand<i32> { let ParserMatchClass = ShifterAsmOperand; } -def ShiftedRegAsmOperand : AsmOperandClass { - let Name = "ShiftedReg"; -} - -def ShiftedImmAsmOperand : AsmOperandClass { - let Name = "ShiftedImm"; -} - // shifter_operand operands: so_reg_reg, so_reg_imm, and so_imm. +def ShiftedRegAsmOperand : AsmOperandClass { let Name = "ShiftedReg"; } def so_reg_reg : Operand<i32>, // reg reg imm ComplexPattern<i32, 3, "SelectRegShifterOperand", [shl, srl, sra, rotr]> { @@ -437,6 +430,7 @@ def so_reg_reg : Operand<i32>, // reg reg imm let MIOperandInfo = (ops GPR, GPR, shift_imm); } +def ShiftedImmAsmOperand : AsmOperandClass { let Name = "ShiftedImm"; } def so_reg_imm : Operand<i32>, // reg imm ComplexPattern<i32, 2, "SelectImmShifterOperand", [shl, srl, sra, rotr]> { |