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authorChris Lattner <sabre@nondot.org>2007-10-03 17:10:03 +0000
committerChris Lattner <sabre@nondot.org>2007-10-03 17:10:03 +0000
commitfce5cfe190fc197a71efd87d3b72902070e48e29 (patch)
treeecc3c32a5c602868b0fc41279643e0a4ce894afd
parent088b5913ef6f91fccc3c931653e16bfeb330c90b (diff)
add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42579 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/README.txt32
1 files changed, 32 insertions, 0 deletions
diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt
index 39c8a02e31..8d090dff3a 100644
--- a/lib/Target/X86/README.txt
+++ b/lib/Target/X86/README.txt
@@ -1330,3 +1330,35 @@ Shark tells us that using %cx in the testw instruction is sub-optimal. It
suggests using the 32-bit register (which is what ICC uses).
//===---------------------------------------------------------------------===//
+
+rdar://5506677 - We compile this:
+
+define i32 @foo(double %x) {
+ %x14 = bitcast double %x to i64 ; <i64> [#uses=1]
+ %tmp713 = trunc i64 %x14 to i32 ; <i32> [#uses=1]
+ %tmp8 = and i32 %tmp713, 2147483647 ; <i32> [#uses=1]
+ ret i32 %tmp8
+}
+
+to:
+
+_foo:
+ subl $12, %esp
+ fldl 16(%esp)
+ fstpl (%esp)
+ movl $2147483647, %eax
+ andl (%esp), %eax
+ addl $12, %esp
+ #FP_REG_KILL
+ ret
+
+It would be much better to eliminate the fldl/fstpl by folding the bitcast
+into the load SDNode. That would give us:
+
+_foo:
+ movl $2147483647, %eax
+ andl 4(%esp), %eax
+ ret
+
+//===---------------------------------------------------------------------===//
+