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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-08-25 22:23:58 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-08-25 22:23:58 +0000 |
| commit | f1a264232c4ae7b39f320bbcd61ac0f39224c285 (patch) | |
| tree | aa3423b1117c89480e9c27c11bbbd9549553b00f | |
| parent | b210cbf692f9b5f862557f399e914059e4cb77ee (diff) | |
Do the same as r138461. Mark VZEROALL as clobbering all YMM registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138592 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 6bafc2d6c7..321d4504a9 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -6175,12 +6175,11 @@ let Defs = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7, def VZEROALL : I<0x77, RawFrm, (outs), (ins), "vzeroall", [(int_x86_avx_vzeroall)]>, TB, VEX, VEX_L, Requires<[HasAVX]>; + // Zero Upper bits of YMM registers + def VZEROUPPER : I<0x77, RawFrm, (outs), (ins), "vzeroupper", + [(int_x86_avx_vzeroupper)]>, TB, VEX, Requires<[HasAVX]>; } -// Zero Upper bits of YMM registers -def VZEROUPPER : I<0x77, RawFrm, (outs), (ins), "vzeroupper", - [(int_x86_avx_vzeroupper)]>, TB, VEX, Requires<[HasAVX]>; - //===----------------------------------------------------------------------===// // SSE Shuffle pattern fragments //===----------------------------------------------------------------------===// |