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| author | Reid Spencer <rspencer@reidspencer.com> | 2007-02-02 13:54:55 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2007-02-02 13:54:55 +0000 |
| commit | ebe57e36dff2dc3a7ceea99202bdb9eb6fe938bc (patch) | |
| tree | 5f4897b1a887d5e17cf1d2e7cbbccaafbeaa66eb | |
| parent | f48ae3353eafcd9f5dd26fd9d76d87674328b78e (diff) | |
Fix a comment that needed to change after SHIFT patch landed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33781 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/VMCore/AsmWriter.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/VMCore/AsmWriter.cpp b/lib/VMCore/AsmWriter.cpp index 8a7c0987c7..f13a140b63 100644 --- a/lib/VMCore/AsmWriter.cpp +++ b/lib/VMCore/AsmWriter.cpp @@ -1270,8 +1270,7 @@ void AssemblyWriter::printInstruction(const Instruction &I) { bool PrintAllTypes = false; const Type *TheType = Operand->getType(); - // Shift Left & Right print both types even for Ubyte LHS, and select prints - // types even if all operands are bools. + // Select, Store and ShuffleVector always print all types. if (isa<SelectInst>(I) || isa<StoreInst>(I) || isa<ShuffleVectorInst>(I)) { PrintAllTypes = true; } else { |