Don't emit SAR X, 0 in the case of sdiv Y, 2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21986 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 7 insertions, 2 deletions

diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp
index fcea635d47..ba3644341c 100644
--- a/lib/Target/X86/X86ISelPattern.cpp
+++ b/lib/Target/X86/X86ISelPattern.cpp
@@ -2699,8 +2699,13 @@ unsigned ISel::SelectExpr(SDOperand N) {
           }
           unsigned RegSize = MVT::getSizeInBits(N.getValueType());
           Tmp1 = SelectExpr(N.getOperand(0));
-          unsigned TmpReg = MakeReg(N.getValueType());
-          BuildMI(BB, SAROpc, 2, TmpReg).addReg(Tmp1).addImm(Log-1);
+          unsigned TmpReg;
+          if (Log != 1) {
+            TmpReg = MakeReg(N.getValueType());
+            BuildMI(BB, SAROpc, 2, TmpReg).addReg(Tmp1).addImm(Log-1);
+          } else {
+            TmpReg = Tmp1;
+          }
           unsigned TmpReg2 = MakeReg(N.getValueType());
           BuildMI(BB, SHROpc, 2, TmpReg2).addReg(TmpReg).addImm(RegSize-Log);
           unsigned TmpReg3 = MakeReg(N.getValueType());