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authorKevin Enderby <enderby@apple.com>2009-10-07 18:01:35 +0000
committerKevin Enderby <enderby@apple.com>2009-10-07 18:01:35 +0000
commit99e6d4e8392497d950d48b03f45c79b7dd131327 (patch)
treeac6b25522e90c63e2b099c701b78dd27fefadf22
parent2627e08e05d8e7521f7c03496ede45868144d426 (diff)
Add another bit of the ARM target assembler to llvm-mc to parse registers
with writeback, things like "sp!", etc. Also added some more stuff to the temporarily hacked methods ARMAsmParser::MatchRegisterName and ARMAsmParser::MatchInstruction to allow more parser testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83477 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp20
1 files changed, 17 insertions, 3 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 4574607c93..c4244c7201 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -100,6 +100,7 @@ struct ARMOperand {
struct {
unsigned RegNum;
+ bool Writeback;
} Reg;
// This is for all forms of ARM address expressions
@@ -146,10 +147,11 @@ struct ARMOperand {
return Res;
}
- static ARMOperand CreateReg(unsigned RegNum) {
+ static ARMOperand CreateReg(unsigned RegNum, bool Writeback) {
ARMOperand Res;
Res.Kind = Register;
Res.Reg.RegNum = RegNum;
+ Res.Reg.Writeback = Writeback;
return Res;
}
@@ -193,10 +195,17 @@ bool ARMAsmParser::ParseRegister(ARMOperand &Op) {
RegNum = MatchRegisterName(Tok.getString());
if (RegNum == 0)
return true;
-
- Op = ARMOperand::CreateReg(RegNum);
getLexer().Lex(); // Eat identifier token.
+ bool Writeback = false;
+ const AsmToken &ExclaimTok = getLexer().getTok();
+ if (ExclaimTok.is(AsmToken::Exclaim)) {
+ Writeback = true;
+ getLexer().Lex(); // Eat exclaim token
+ }
+
+ Op = ARMOperand::CreateReg(RegNum, Writeback);
+
return false;
}
@@ -396,6 +405,8 @@ unsigned ARMAsmParser::MatchRegisterName(const StringRef &Name) {
return 2;
else if (Name == "r3")
return 3;
+ else if (Name == "sp")
+ return 13;
return 0;
}
@@ -406,6 +417,9 @@ bool ARMAsmParser::MatchInstruction(SmallVectorImpl<ARMOperand> &Operands,
assert(Op0.Kind == ARMOperand::Token && "First operand not a Token");
const StringRef &Mnemonic = Op0.getToken();
if (Mnemonic == "add" ||
+ Mnemonic == "stmfd" ||
+ Mnemonic == "str" ||
+ Mnemonic == "ldmfd" ||
Mnemonic == "ldr")
return false;