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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-12-05 20:50:53 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-12-05 20:50:53 +0000 |
| commit | 7962065fdb88e2b1b970097a8e129e99404a5146 (patch) | |
| tree | 32edf4a9e52d4a089024ab619f51b73ccae848b1 | |
| parent | e08dc62b1a3b72e351165128ba63c2cdd2f41eb6 (diff) | |
move this over to the dag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24609 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Alpha/AlphaISelDAGToDAG.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.td | 11 |
2 files changed, 9 insertions, 10 deletions
diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index 8e2e39e7cd..e96ec70d70 100644 --- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -247,14 +247,6 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) { CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>(N)->getSymbol(), MVT::i64), getGlobalBaseReg()); - case ISD::CALLSEQ_START: - case ISD::CALLSEQ_END: { - unsigned Amt = cast<ConstantSDNode>(N->getOperand(1))->getValue(); - unsigned Opc = N->getOpcode() == ISD::CALLSEQ_START ? - Alpha::ADJUSTSTACKDOWN : Alpha::ADJUSTSTACKUP; - return CurDAG->SelectNodeTo(N, Opc, MVT::Other, - getI64Imm(Amt), Select(N->getOperand(0))); - } case ISD::RET: { SDOperand Chain = Select(N->getOperand(0)); // Token chain. SDOperand InFlag; diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td index a1f520a3c6..82618f925d 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.td +++ b/lib/Target/Alpha/AlphaInstrInfo.td @@ -26,6 +26,11 @@ def Alpha_cvtqt : SDNode<"AlphaISD::CVTQT_", SDTFPUnaryOpUnC, []>; def Alpha_cvtqs : SDNode<"AlphaISD::CVTQS_", SDTFPUnaryOpUnC, []>; def Alpha_cvttq : SDNode<"AlphaISD::CVTTQ_", SDTFPUnaryOp, []>; +// These are target-independent nodes, but have target-specific formats. +def SDT_AlphaCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>; +def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeq,[SDNPHasChain]>; +def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_AlphaCallSeq,[SDNPHasChain]>; + //******************** //Paterns for matching @@ -99,8 +104,10 @@ def IDEF_F64 : PseudoInstAlpha<(ops F8RC:$RA), "#idef $RA", [(set F8RC:$RA, (undef))]>; def WTF : PseudoInstAlpha<(ops variable_ops), "#wtf", []>; -def ADJUSTSTACKUP : PseudoInstAlpha<(ops variable_ops), "ADJUP", []>; -def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops variable_ops), "ADJDOWN", []>; +def ADJUSTSTACKUP : PseudoInstAlpha<(ops s64imm:$amt), "ADJUP", + [(callseq_start imm:$amt)]>; +def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops s64imm:$amt), "ADJDOWN", + [(callseq_end imm:$amt)]>; def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$TARGET:\n", []>; def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n",[]>; def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m), |