diff options
| author | Dale Johannesen <dalej@apple.com> | 2009-10-29 01:15:40 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2009-10-29 01:15:40 +0000 |
| commit | 78c5cdaf2a24c9d2b5c89fdb5d66fd6ca3b5654b (patch) | |
| tree | 2c224b2cec204431a37e65f36c1cfcff52ad51da | |
| parent | 8bedf97f683bd5edb9308799a5e525de137d635c (diff) | |
When there is a 2-instruction spill sequence, record
the second (store) instruction in SpillSlotToUsesMap
consistently. I don't think this matters functionally,
but it's cleaner and Evan wants it this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85463 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/VirtRegRewriter.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/CodeGen/VirtRegRewriter.cpp b/lib/CodeGen/VirtRegRewriter.cpp index a9ff1ad9ae..fd80f46099 100644 --- a/lib/CodeGen/VirtRegRewriter.cpp +++ b/lib/CodeGen/VirtRegRewriter.cpp @@ -1432,7 +1432,7 @@ private: MachineBasicBlock::iterator oldNextMII = next(MII); TII->storeRegToStackSlot(MBB, next(MII), PhysReg, true, StackSlot, RC); - MachineInstr *StoreMI = next(MII); + MachineInstr *StoreMI = prior(oldNextMII); VRM.addSpillSlotUse(StackSlot, StoreMI); DEBUG(errs() << "Store:\t" << *StoreMI); @@ -1751,8 +1751,9 @@ private: const TargetRegisterClass *RC = RegInfo->getRegClass(VirtReg); unsigned Phys = VRM.getPhys(VirtReg); int StackSlot = VRM.getStackSlot(VirtReg); + MachineBasicBlock::iterator oldNextMII = next(MII); TII->storeRegToStackSlot(MBB, next(MII), Phys, isKill, StackSlot, RC); - MachineInstr *StoreMI = next(MII); + MachineInstr *StoreMI = prior(oldNextMII); VRM.addSpillSlotUse(StackSlot, StoreMI); DEBUG(errs() << "Store:\t" << *StoreMI); VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod); |