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authorAlkis Evlogimenos <alkis@evlogimenos.com>2004-03-15 17:20:14 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2004-03-15 17:20:14 +0000
commit63dd4ff809edf16552aecdb082a52ef9364d16aa (patch)
tree3574b292d53ad7ba849ae99906a63d044af362e5
parent6dd196f762c934981ede17e197746b11426cd23a (diff)
Add LAHF instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12424 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86InstrInfo.td1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 2a7a933593..4e92b5c1f8 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -600,6 +600,7 @@ def TEST32mi : Im32i32<"test", 0xF7, MRM0m >; // flags = [mem32] &
// Condition code ops, incl. set if equal/not equal/...
def SAHF : I <"sahf" , 0x9E, RawFrm>, Imp<[AH],[]>; // flags = AH
+def LAHF : I <"lahf" , 0x9F, RawFrm>, Imp<[],[AH]>; // AH = flags
def SETBr : I <"setb" , 0x92, MRM0r>, TB; // R8 = < unsign
def SETBm : Im8<"setb" , 0x92, MRM0m>, TB; // [mem8] = < unsign